Silicon Carbide Body Diode Structure to Limit Stacking Faults
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon carbide semiconductor devices experience bipolar degradation due to body diodes conducting, leading to increased on-voltage and forward voltage, caused by the expansion of stacking faults in the n-type drift region during forward conduction, which affects the device's performance and efficiency.
Innovation Solution
The silicon carbide semiconductor device incorporates a structure with reduced impurity concentration in specific semiconductor regions, such as the p−-type base regions and p-type base regions, and optimized pitch arrangements of contact regions to minimize hole diffusion and reduce the expansion of stacking faults, thereby reducing bipolar degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If body diodes are formed by conventional pn junctions in silicon carbide semiconductor devices, then the device structure is simple and manufacturing is easier, but bipolar degradation occurs due to stacking fault expansion during forward conduction, leading to increased on-voltage and forward voltage
Solution Approach 1:
The patent applies local quality by creating specific low-impurity concentration regions (with impurity concentration of 1×10^16/cm³ or less) at predetermined positions where stacking faults are likely to occur, while other regions maintain conventional impurity concentrations. This localized modification prevents stacking fault expansion in critical areas without requiring complete restructuring of the entire device, thus resolving the contradiction between manufacturing ease and device performance.
2Reliability
If impurity concentration is reduced in base regions to minimize hole diffusion, then stacking fault expansion is reduced and bipolar degradation is minimized, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies parameter changes by specifically controlling the impurity concentration parameter in certain regions to be 1×10^16/cm³ or less, while maintaining higher impurity concentrations in other regions. This selective parameter modification achieves the dual benefit of reducing hole diffusion and stacking fault expansion (improving reliability) while allowing conventional manufacturing processes to be used in other areas (maintaining manufacturing feasibility).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively minimizes bipolar degradation by limiting hole diffusion and stacking fault expansion, resulting in reduced on-voltage and forward voltage, enhancing the device's performance and efficiency.
Implementation Method 1
minimize hole diffusion and reduce the expansion of stacking faults
Data Source
AI summary
P++-type contact regions are disposed apart from one another, and in a p−-type base region, at least hole current regions directly beneath the contact regions have an impurity concentration of not more than 5×1016/cm3. A p+-type region for mitigating electric field and disposed between adjacent gate trenches is separated into first portions in contact with the hole current regions and second portions in contact with only a portion of the base region other than the hole current regions. During conduction of body diodes, forward current flows into an n−-type drain region through the contact regions, the hole current regions, and the first portions. Thus, in the drain region, holes from the base region are injected only into hole injection regions that are directly beneath the first portions, but are not injected into regions that respectively surround peripheries of the hole injection regions.