SiC Semiconductor Body Region Segmentation for Switching Loss Reduction
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Solution Overview
Problem
Conventional silicon carbide (SiC) semiconductor elements face issues with crystallinity degradation and increased manufacturing costs due to the need for separate inverse diode elements, leading to higher switching losses and reduced reliability in power converter applications.
Innovation Solution
A method for fabricating an SiC semiconductor element with a body region structured into two distinct regions of different dopant concentrations, allowing for integrated inverse diode functionality without increasing the number of components, which minimizes crystallinity degradation and reduces switching losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a body diode is used as an inverse diode in SiC-FET, then the device structure is simple, but crystallinity degradation occurs and stacking faults grow at the pn junction
Solution Approach 1:
The body region is divided into two distinct regions: a first body region with higher dopant concentration and a second body region with lower dopant concentration. This segmentation allows the first body region to provide strong diode functionality while the second body region maintains better crystallinity and reduces stacking fault growth, thus resolving the contradiction between device simplicity and crystallinity maintenance.
Solution Approach 2:
Different regions of the body are assigned different dopant concentrations to fulfill different functional requirements. The first body region has higher dopant concentration for effective inverse diode operation, while the second body region has lower dopant concentration to preserve crystallinity and reduce degradation, implementing local quality optimization.
2Reliability
If a separate inverse diode element is connected in anti-parallel with SiC-FET, then crystallinity degradation is reduced, but the number of parts increases and manufacturing cost rises
Solution Approach 1:
The inverse diode functionality is merged into the SiC-FET structure itself by creating a specialized body region configuration. The second body region with lower dopant concentration serves both as part of the FET structure and as the inverse diode region, eliminating the need for a separate inverse diode element while maintaining crystallinity benefits.
Solution Approach 2:
The body region is designed to serve multiple functions: the first body region provides the primary FET operation with high dopant concentration, while the second body region provides inverse diode functionality with lower dopant concentration. This multi-functionality eliminates the need for separate components.
3Ease of operation
If bipolar operation is used in the pn junction for reverse current, then the inverse diode function is achieved, but reverse recovery current causes switching loss and reduced switching rate
Solution Approach 1:
The dopant concentration parameter is changed across different body regions to optimize performance. The second body region with lower dopant concentration reduces reverse recovery current and switching losses while maintaining the inverse diode function, thus resolving the contradiction between operational capability and energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach provides a high-reliability SiC semiconductor element with reduced switching losses and maintained breakdown voltage, eliminating the need for separate inverse diode elements and lowering manufacturing costs.
Implementation Method 1
thermally treating the first silicon carbide semiconductor layer to turn the dopant implanted region and the first body implanted region into a doped region and a first body region, respectively
Implementation Method 2
implanting a dopant of the first conductivity type using the first mask and the sidewall
Data Source
AI summary
A method for fabricating a semiconductor element according to the present disclosure includes the steps of: (A) forming a first silicon carbide semiconductor layer of a first conductivity type on a semiconductor substrate; (B) forming a first mask to define a body region on the first silicon carbide semiconductor layer; (C) forming a body implanted region of a second conductivity type in the first silicon carbide semiconductor layer using the first mask; (D) forming a sidewall on side surfaces of the first mask; (E) defining a dopant implanted region of the first conductivity type and a first body implanted region of the second conductivity type in the first silicon carbide semiconductor layer using the first mask and the sidewall; and (F) thermally treating the first silicon carbide semiconductor layer.