SiC Buffer Layer Minority Carrier Capture
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing techniques for manufacturing silicon carbide (SiC) epitaxial wafers suffer from crystal defects and dislocations, particularly basal plane dislocations, which lead to bar-shaped stacking faults that hinder the performance of SiC semiconductor devices during bipolar operations, and thick buffer layers intended to mitigate this issue increase costs and defect density.
Innovation Solution
A method involving the epitaxial growth of a silicon carbide substrate with a buffer layer doped with a main dopant and an auxiliary dopant to capture minority carriers, reducing the thickness of the buffer layer while maintaining effective carrier extinction, thereby preventing bar-shaped stacking faults without significantly increasing the epitaxial growth layer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the buffer layer is increased to prevent bar-shaped stacking faults, then the occurrence of stacking faults is suppressed, but the manufacturing cost increases and the defect density increases
Solution Approach 1:
The patent changes the chemical composition parameters of the buffer layer by incorporating aluminum oxide (Al2O3) at controlled concentrations (0.1-10 nm thickness layer). This compositional parameter change enables effective stacking fault prevention while maintaining thin buffer layer thickness, thereby avoiding the cost increase associated with thick buffer layers.
Solution Approach 2:
The patent creates a composite buffer layer structure combining silicon carbide (SiC) with aluminum oxide (Al2O3). This composite material approach provides enhanced stacking fault prevention capability compared to pure SiC buffer layers, allowing thinner overall buffer thickness while maintaining or improving reliability.
2Reliability
If the thickness of the buffer layer is increased to prevent bar-shaped stacking faults, then the occurrence of stacking faults is suppressed, but the yield is reduced
Solution Approach 1:
By changing the compositional parameters to include Al2O3 in the buffer layer, the patent achieves effective stacking fault prevention with reduced buffer thickness. This parameter optimization reduces the area affected by defects and improves overall wafer yield.
3Reliability
If the thickness of the buffer layer is increased to prevent bar-shaped stacking faults, then the occurrence of stacking faults is suppressed, but the resistance of the epitaxial wafer increases
Solution Approach 1:
The patent optimizes the buffer layer composition by incorporating Al2O3 at specific concentrations and thicknesses (0.1-10 nm). This compositional parameter change enables effective stacking fault prevention while maintaining low electrical resistance by avoiding excessive buffer thickness that would increase resistive losses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the occurrence of bar-shaped stacking faults during high-current bipolar operations while minimizing the buffer layer thickness, enhancing the reliability and efficiency of SiC semiconductor devices.
Implementation Method 1
doping an auxiliary dopant for capturing minority carriers to the substrate at a doping concentration less than the doping concentration of the main dopant
Implementation Method 2
epitaxially growing a buffer layer on the substrate
Implementation Method 3
epitaxially growing the voltage-blocking-layer on the buffer layer
Data Source
AI summary
A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.