SiC Buffer Layer for Non-Uniform Etching Compensation
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Solution Overview
Problem
The fabrication of Silicon Carbide (SiC) Gate Turn-Off Thyristors (GTOs) faces challenges due to surface recombination and non-uniform etching, leading to current gain instability and reduced yield, as the etching process damages the crystalline structure and results in interface charge, increasing turn-on current and on-resistance, and causing over-etching near the edges of semiconductor wafers.
Innovation Solution
Incorporating a semiconductor buffer layer of appropriate thickness and doping type to mitigate surface recombination and compensate for non-uniform etching, which reduces interface charge and stabilizes current gain by moving it away from the base layers, thereby increasing the yield and reducing turn-on current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a standard etching process is used to form the anode, then the P-type semiconductor layers are etched to the desired depth, but non-uniform etching occurs across the wafer causing over-etching at the edges and damage to the base layer
Solution Approach 1:
The buffer layer is grown on the base layer before the contact layers are formed, serving as a pre-prepared protective structure that compensates for anticipated non-uniform etching. The buffer layer thickness is specifically designed to accommodate the maximum expected over-etching variation across the wafer, ensuring that even at wafer edges where over-etching occurs, the etching does not penetrate into the base layer.
Solution Approach 2:
The buffer layer acts as an intermediary structure between the base layer and the contact layers. It absorbs the harmful effects of non-uniform etching by providing an additional layer that can be selectively removed without exposing the base layer to damage. This intermediary structure mediates the conflict between achieving sufficient etching depth and preventing base layer damage.
2Reliability
If the etching process is performed to reach the base layer, then the desired device structure is achieved, but surface recombination increases due to interface charge and crystalline damage
Solution Approach 1:
The buffer layer serves as an intermediary that protects the base layer from direct exposure to etching damage. By positioning the buffer layer between the etching process and the base layer, it prevents the generation of interface charge and crystalline damage at the critical base layer interface, thereby reducing surface recombination while still allowing the device structure to be properly formed.
Solution Approach 2:
The buffer layer provides beforehand cushioning by being grown in advance with sufficient thickness to absorb the full extent of expected etching overhang. This pre-positioned protective layer ensures that even when non-uniform etching occurs, the base layer remains protected from damage that would cause surface recombination, maintaining device reliability.
3Reliability
If the buffer layer thickness is increased to compensate for over-etching, then base layer protection is improved, but the gain of the top transistor decreases due to increased turn-on current
Solution Approach 1:
The buffer layer thickness is optimized by changing the parameter of layer thickness to achieve the minimum required value that provides sufficient protection against over-etching while minimizing the impact on device performance. By carefully controlling the thickness parameter within a specific range, the patent achieves the optimal balance between protection and performance, preventing both base layer damage and excessive turn-on current.
Data Source
AI summary
Electronic device structures that compensate for non-uniform etching on a semiconductor wafer and methods of fabricating the same are disclosed. In one embodiment, the electronic device includes a number of layers including a semiconductor base layer of a first doping type formed of a desired semiconductor material, a semiconductor buffer layer on the base layer that is also formed of the desired semiconductor material, and one or more contact layers of a second doping type on the buffer layer. The one or more contact layers are etched to form a second contact region of the electronic device. The buffer layer reduces damage to the semiconductor base layer during fabrication of the electronic device. Preferably, a thickness of the semiconductor buffer layer is selected to compensate for over-etching due to non-uniform etching on a semiconductor wafer on which the electronic device is fabricated.


