SiC Substrate Buffer Layer to Stop Stacking Fault Expansion

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Solution Overview

Problem

Current manufacturing processes for silicon carbide substrates are prone to defects such as stacking faults, which can propagate and degrade device performance and reliability, particularly during epitaxial growth and device operation.

Innovation Solution

Incorporation of a pre-epitaxial buffer layer formed through engineered ion implantation near the substrate surface to modulate thermoelectric stresses, inhibiting the formation and glide of crystallographic defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional manufacturing processes are used for silicon carbide substrates, then production cost and manufacturing simplicity are maintained, but crystallographic defects such as stacking faults form and propagate through the substrate and epitaxial layer

Engineering Contradiction:
Improvedefect-free epitaxial layerVSAvoidsubstrate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A pre-epitaxial buffer layer is formed in the substrate before epitaxial growth to prevent stacking fault formation. This preliminary action addresses defects at their source by modifying the substrate structure in advance, eliminating the need for complex post-growth defect correction processes while ensuring high-quality epitaxial layers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pre-epitaxial buffer layer acts as an intermediary between the substrate and the epitaxial layer. This buffer layer intercepts and prevents the propagation of crystallographic defects from the substrate into the epitaxial layer, serving as a protective barrier that improves reliability without complicating the overall device structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ion implantation is used to form a pre-epitaxial buffer layer, then stacking fault propagation is inhibited, but manufacturing process complexity increases

Engineering Contradiction:
Improvestacking fault preventionVSAvoidion implantation process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Ion implantation parameters such as ion species, energy, dose, and implantation depth are precisely controlled to form the pre-epitaxial buffer layer at specific locations in the substrate. By optimizing these parameters, the process achieves reliable stacking fault prevention while maintaining manufacturability through standardized ion implantation equipment and procedures.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If the substrate structure is modified to include a pre-epitaxial buffer layer, then defect formation is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebuffer layer positioningVSAvoiddefect mitigation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The mechanical positioning and formation of the pre-epitaxial buffer layer through ion implantation replaces less precise mechanical methods of defect control. The ion implantation process provides precise spatial and depth control of the buffer layer formation, achieving the required manufacturing precision while effectively mitigating defects through controlled modification of the substrate structure.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The buffer layer effectively prevents the propagation of defects through the substrate and epitaxial layer, enhancing device reliability and performance by mitigating stacking fault expansion.

Implementation Method 1

formation of a buffer layer in the substrate using engineered ion implantation prior to epitaxial layer deposition

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

the ion implanted buffer layer modulates thermoelectric stresses proximate to the substrate surface

Methodology Applied
Scientific EffectThermoelectric stress modulation: Thermal Expansion

Implementation Method 3

epitaxial layer deposition

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20250316481A1Substrate including a pre-epitaxial stacking fault expansion-stop layer, devices including the same, and process of manufacture
Publication Date: 2025.10.09 AXCELIS TECHNOLOGIES INC
  • US20250316481A1 patent drawing
  • US20250316481A1 patent drawing

AI summary

A semiconductor substrate including an epitaxial layer thereon includes a buffer layer of ions formed in the substrate at a depth proximate to an interface between the substrate upper surface and the epitaxial layer provided thereon. The buffer layer defines a pre-epitaxial stack fault expansion-stop layer, wherein the ion implanted buffer layer reduces and modulates thermoelectric stresses proximate to the substrate surface, which inhibits formation and glide of crystallographic defects in and through the substrate that may have been present in the semiconductor substrate as a function of the manufacturing process. Also disclosed are processes for forming the buffer layer in the semiconductor substrate.