SiC Substrate Buffer Layer Segmentation for Stacking Fault Suppression

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Solution Overview

Problem

Conventional silicon carbide semiconductor substrates suffer from high densities of basal plane dislocations, leading to increased ON voltage and bipolar degradation due to the formation of stacking faults during epitaxial growth, which complicates the measurement of buffer layer thickness using FT-IR and results in decreased yield and increased substrate resistance.

Innovation Solution

A silicon carbide semiconductor substrate is designed with a structure that includes an epitaxial layer, a buffer layer with an impurity concentration three times that of the epitaxial layer, and a drift layer, allowing for effective suppression of stacking faults and enabling accurate measurement of the buffer layer thickness through infrared light reflection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thick buffer layer is formed by epitaxial growth to suppress excessive hole injection, then bipolar degradation is suppressed, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvebipolar degradation suppressionVSAvoidbuffer layer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer is divided into multiple layers with different impurity concentrations (first buffer layer with higher concentration, second buffer layer with lower concentration). This segmentation allows each layer to perform specific functions: the first buffer layer suppresses hole injection while the second buffer layer reduces manufacturing complexity by using a simpler growth condition

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the buffer layer have different impurity concentrations tailored to local requirements. The first buffer layer near the substrate has higher impurity concentration for effective hole injection suppression, while the second buffer layer has lower impurity concentration for simplified manufacturing

Inventive Principle:
Principle #3Local quality

2Reliability

If basal plane dislocations are present in the substrate, then substrate resistance increases and yield decreases, but completely eliminating them is difficult

Engineering Contradiction:
Improvesubstrate resistance and yieldVSAvoiddislocation elimination difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The buffer layer acts as an intermediary between the substrate with dislocations and the active device regions. It provides a transition zone that prevents dislocation propagation into the active regions, thereby improving substrate resistance and yield without requiring complete dislocation elimination from the substrate

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is formed preliminarily during epitaxial growth before the active device layers are created. This preliminary structure prevents dislocation propagation in advance, protecting subsequent layers from defect contamination

Inventive Principle:
Principle #10Preliminary action

3Reliability

If stacking faults are generated during bipolar operation, then ON voltage increases and device performance degrades, but preventing them requires complex buffer layer configurations

Engineering Contradiction:
ImproveON voltage stabilityVSAvoidbuffer layer configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer is segmented into multiple layers with different impurity concentrations to effectively suppress stacking fault generation during bipolar operation while maintaining reasonable manufacturing complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The impurity concentration parameter is changed across different buffer layer regions (higher in first buffer layer, lower in second buffer layer) to optimize stacking fault suppression while controlling manufacturing complexity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses stacking faults and allows for precise measurement of the buffer layer thickness, improving the yield and reducing substrate resistance in silicon carbide semiconductor devices.

Implementation Method 1

Factors causing the bar-shaped stacking fault and the triangular-shaped stacking faults include electron-hole recombination. To suppress this recombination, there is a technique that prevents excessive hole injection to the substrate by forming a thick buffer layer on the substrate by epitaxial growth

Methodology Applied
Scientific EffectElectron-hole recombination:

Implementation Method 2

allowing for precise measurement of the buffer layer thickness through infrared light reflection

Methodology Applied
Scientific EffectInfrared light reflection: Reflection

Implementation Method 3

An epitaxial wafer (silicon carbide semiconductor substrate, hereinafter, simply, substrate) in which silicon carbide (SiC) is formed on a substrate by epitaxial growth

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS10796906B2Silicon carbide semiconductor substrate, method of manufacturing silicon carbide semiconductor substrate, semiconductor device, and method of manufacturing semiconductor device
Publication Date: 2020.10.06 FUJI ELECTRIC CO LTD
  • US10796906B2 patent drawing
  • US10796906B2 patent drawing
  • US10796906B2 patent drawing

AI summary

A silicon carbide semiconductor substrate includes a silicon carbide substrate of a first conductivity type, an epitaxial layer of the first conductivity type provided on a front surface of the silicon carbide substrate, an impurity concentration of the epitaxial layer being 1×1017/cm3 to 1×1018/cm3, and a film thickness of the epitaxial layer being 1 μm to 5 μm. The silicon carbide semiconductor substrate further includes a buffer layer of the first conductivity type provided on a surface of a first side of the epitaxial layer opposite a second side facing the silicon carbide substrate, an impurity concentration of the buffer layer being about a same as that of the silicon carbide substrate, and a drift layer of the first conductivity type provided on a surface of a first side of the buffer layer opposite a second side facing toward the silicon carbide substrate, an impurity concentration of the drift layer being lower than that of the buffer layer.