SiC Charge-Balanced Diode Deep Dopant Penetration
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Solution Overview
Problem
Silicon carbide (SiC) charge-balanced diodes face challenges in achieving deep dopant penetration due to low diffusion coefficients, limiting the depth of charge-balance regions formed in SiC epitaxial layers compared to silicon, which affects the performance of SiC power devices.
Innovation Solution
The design incorporates multi-layered active cell structures with buried regions and junction barrier Schottky (JBS) implanted regions, utilizing repeated epitaxial growth and dopant implantation steps, allowing for deeper charge balance and reduced on-resistance, conduction losses, and higher breakdown voltages, while maintaining a simple fabrication process using existing semiconductor equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dopant implantation is performed in SiC epitaxial layer using typical Si processing energies, then implantation process is simple and compatible with existing equipment, but dopant penetration depth is limited to 0.5-1 μm
Solution Approach 1:
The patent divides the single deep implantation process into multiple sequential implantation steps, each creating a distinct dopant concentration peak at different depths. This segmentation allows achievement of deep overall penetration (exceeding 10 μm) while using moderate implantation energies compatible with existing equipment, resolving the contradiction between implantation simplicity and penetration depth.
Solution Approach 2:
The patent employs periodic alternation between epitaxial growth and dopant implantation cycles. Each cycle consists of growing an epitaxial layer, performing a dopant implantation to create a concentration peak, then repeating the process. This periodic action enables progressive buildup of deep dopant profiles through multiple controlled steps, achieving deep penetration without requiring excessively high single-step implantation energies.
2Length of moving object
If multiple epitaxial growth and implantation steps are performed, then dopant penetration depth increases beyond 10 μm, but manufacturing process complexity increases
Solution Approach 1:
The patent uses standard, commercially available epitaxial and implantation equipment for each step of the multi-cycle process. By relying on existing universal semiconductor manufacturing tools rather than specialized equipment, the patent achieves deep dopant penetration through multiple steps while minimizing the increase in manufacturing complexity and cost.
Solution Approach 2:
The patent systematically varies implantation parameters (energy, dose, tilt angle) and epitaxial growth parameters (thickness, doping concentration) across different cycles to optimize the dopant profile. This controlled parameter variation enables precise depth control and concentration profiling, achieving deep penetration (>10 μm) while maintaining process manageability through systematic parameter optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach enables SiC CB diodes to operate at higher current densities and switching frequencies with reduced on-resistance and conduction losses, achieving lower on-state resistance and higher breakdown voltages compared to conventional SiC or Si diodes, while being robust to doping variability and compatible with existing manufacturing infrastructure.
Implementation Method 1
an active area may be formed by implanting or diffusing a number of vertical pillars of a first dopant type (e.g., p-type) into a Si device layer of a second dopant type (e.g., n-type)
Implementation Method 2
Si charge-balanced devices, an active area may be formed by implanting or diffusing a number of vertical pillars of a first dopant type (e.g., p-type) into a Si device layer of a second dopant type (e.g., n-type). The vertical pillars of these Si charge-balanced devices extend through the thickness (e.g., tens of micrometers) of the Si epitaxial device layer
Implementation Method 3
an active area may be formed by implanting or diffusing a number of vertical pillars of a first dopant type (e.g., p-type) into a Si device layer of a second dopant type (e.g., n-type)
Data Source
AI summary
A charge-balanced (CB) diode may include one or more CB layers. Each CB layer may include an epitaxial layer having a first conductivity type and a plurality of buried regions having a second conductivity type. Additionally, the CB diode may include an upper epitaxial layer having the first conductivity type that is disposed adjacent to an uppermost CB layer of the one or more CB layers. The upper epitaxial layer may also include a plurality of junction barrier (JBS) implanted regions having the second conductivity type. Further, the CB diode may include a Schottky contact disposed adjacent to the upper epitaxial layer and the plurality of JBS implanted regions.