SiC Channel Stopper Segmentation for Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In silicon carbide semiconductor devices, forming a semiconductor region of arbitrary conductivity type by diffusion is difficult, leading to lattice defects and increased leakage current due to the high-temperature activation process required after ion implantation, which affects electrical properties and generates leak sources.
Innovation Solution
A semiconductor device structure with a wide band gap semiconductor substrate and deposited layers of varying conductivity types, including a high impurity concentration channel stopper region surrounded by a low impurity concentration region, forming a concentration gradient to reduce misfit dislocation and suppress leakage current, along with a metal-semiconductor junction and ohmic junction configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ion implantation is used to form a high impurity concentration channel stopper region, then the channel stopper can be formed with high impurity concentration, but lattice defects are generated and leakage current increases
Solution Approach 1:
The channel stopper region is segmented into two distinct zones: a first channel stopper region with lower impurity concentration (1×10^18 to 1×10^20 atoms/cm³) and a second channel stopper region with higher impurity concentration (1×10^19 to 1×10^21 atoms/cm³). This segmentation allows the high impurity concentration zone to suppress depletion layer spreading while the lower concentration zone reduces lattice defects and leakage current, resolving the contradiction between achieving high impurity concentration and minimizing reliability issues.
Solution Approach 2:
Different regions of the channel stopper are assigned different impurity concentrations based on their specific functional requirements. The first channel stopper region (closer to the drift region) uses lower impurity concentration to minimize lattice defects, while the second channel stopper region (outer region) uses higher impurity concentration to effectively suppress depletion layer spreading. This local differentiation of quality optimizes both leakage suppression and defect reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively reduces leakage current and achieves high breakdown voltage with low electric current leaks, improving the semiconductor device's performance and yield by mitigating lattice defects and enhancing crystal structure alignment.
Implementation Method 1
a deposited semiconductor layer of the first conductivity type and deposited on a surface of the semiconductor substrate
Implementation Method 2
ion implantation is used
Data Source
AI summary
A semiconductor device of an embodiment includes a p+-type region selectively disposed in a surface of an n-type silicon carbide epitaxial layer disposed on an n+-type silicon carbide substrate, an element structure that includes a source electrode and a p+-type region that form a metal-semiconductor junction on the n-type silicon carbide epitaxial layer, a p−-type region and another p−-type region that surround the periphery of the element structure, and an n+-type channel stopper region that surrounds the periphery of the p−-type regions so that the n-type silicon carbide epitaxial layer is therebetween. The n+-type channel stopper region has a second n+-type channel stopper region whose impurity concentration is high, and a first n+-type channel stopper region that encompasses the second n+-type channel stopper region and whose impurity concentration is lower than that of the second n+-type channel stopper region.