SiC Chip Al Buffer Layers for Crack-Resistant Wire Bonding
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Solution Overview
Problem
SiC semiconductor devices are prone to cracking due to excessive external forces applied during mounting and lead wire bonding processes, which can damage the chip.
Innovation Solution
The SiC semiconductor device incorporates a first Al layer as a buffer layer on the first main surface to relax external forces from that side and a second Al layer as a buffer layer on the second main surface to relax forces from the opposite side, using the cushioning properties of Al to reduce stress on the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the SiC semiconductor device is mounted using a suction nozzle and press mounted onto a connection object, then the mounting process can be completed, but external forces are applied to the SiC chip that may cause cracks
Solution Approach 1:
The patent applies beforehand cushioning by forming a resin layer around the SiC chip before the mounting process. This resin layer acts as a cushioning structure that absorbs and distributes external forces applied during suction nozzle mounting and press mounting operations, preventing these forces from being concentrated on the SiC chip and causing cracks.
2Reliability
If a lead wire is press bonded onto the pad electrode by a capillary, then the electrical connection can be established, but external forces are applied to the SiC chip that may cause cracks
Solution Approach 1:
The resin layer serves as a cushioning structure that is already in place before lead wire bonding. During the capillary press bonding process, external forces are distributed through the resin layer rather than being concentrated on the SiC chip, allowing reliable electrical connection to be established without causing cracks to the chip.
3Ease of manufacture
If external forces are applied to the SiC semiconductor device during assembly and bonding processes, then the device can be assembled, but cracks are generated in the SiC chip when the external force exceeds the chip's strength
Solution Approach 1:
The resin layer is formed as a cushioning structure before assembly operations. During mounting and lead wire bonding processes, this pre-formed resin layer absorbs and distributes external forces, preventing force concentration on the SiC chip and thereby maintaining chip integrity while allowing assembly to proceed.
Solution Approach 2:
The resin layer acts as an intermediary structure between the external mounting/bonding processes and the SiC chip. It mediates the transmission of external forces, distributing them across a larger area rather than allowing direct concentration on the chip, thus protecting the chip while enabling assembly operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the risk of cracking by distributing and mitigating external forces, ensuring the SiC chip's integrity during assembly and bonding processes.
Implementation Method 1
the first Al layer is formed as a first buffer layer that relaxes an external force at the first main surface side and the second Al layer is formed as a second buffer layer that relaxes an external force at the second main surface side
Data Source
AI summary
An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.