SiC Semiconductor Chip Rib Grooves for Void-Free Soldering

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Solution Overview

Problem

Semiconductor devices with thin SiC chips face challenges in mechanical strength and soldering defects due to insufficient solder filling in concave portions, leading to voids or solder wetting issues during mounting on base substrates, which affect heat transfer and device reliability.

Innovation Solution

A semiconductor device design featuring a rib with grooves on its outer circumference to facilitate air ventilation, ensuring uniform solder distribution and preventing defects by allowing air to escape during soldering, thus maintaining mechanical strength and improving heat transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the thickness of the semiconductor substrate is reduced to reduce on-resistance, then electrical connection loss is reduced, but the mechanical strength of the semiconductor substrate becomes insufficient and it may break during manufacturing

Engineering Contradiction:
Improveelectrical connection lossVSAvoidmechanical strength
Core Design Contradiction:
Loss of energyVSStrength

Solution Approach 1:

The patent applies local quality by creating a concave portion only in the region opposite the element structure, while maintaining the original thickness in other regions. This allows the chip to have reduced thickness (and thus reduced on-resistance) locally where needed, while maintaining sufficient mechanical strength in the overall structure. The concave portion is strategically positioned to achieve electrical performance without compromising structural integrity.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the depth of the concave portion is increased to reduce on-resistance, then electrical connection loss is reduced, but the mechanical strength of the chip is reduced and it becomes difficult to process

Engineering Contradiction:
Improveon-resistanceVSAvoidprocessability
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent limits the depth of the concave portion to a specific range (5 μm to 50 μm) to achieve the optimal balance between reducing on-resistance and maintaining processability. This controlled local modification allows sufficient thickness reduction for electrical performance while preventing excessive depth that would compromise mechanical strength and manufacturing ease.

Inventive Principle:
Principle #3Local quality

3Reliability

If solder is applied to fill the concave portion, then electrical connection is improved, but air trapped in the concave portion causes voids or solder wetting defects during mounting

Engineering Contradiction:
Improvesoldering reliabilityVSAvoidvoids and solder wetting defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces air holes in the rib structure before the soldering process to enable air escape during solder filling. This preliminary structural preparation ensures that when solder is applied, trapped air can escape through the air holes, preventing void formation and solder wetting defects, thereby ensuring reliable soldering without generating harmful defects.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9577032B2Semiconductor device
Publication Date: 2017.02.21 FUJI ELECTRIC CO LTD
  • US9577032B2 patent drawing
  • US9577032B2 patent drawing
  • US9577032B2 patent drawing

AI summary

A groove for air ventilation is formed in a rib with a substantially rectangular ring shape which is provided so as to surround a concave portion provided in a rear surface of a semiconductor chip. The groove is provided in each side or at each corner of the rib so as to traverse the rib from the inner circumference to the outer circumference of the rib. The depth of the groove is equal to or less than the depth of the concave portion provided in the rear surface of the chip. In this way, it is possible to reliably solder a semiconductor device, in which the concave portion is provided in the rear surface of the semiconductor chip and the rib is provided in the outer circumference of the concave portion, to a base substrate, without generating a void in a drain electrode provided in the concave portion.