Self-Interference Cancellation Circuit for In-band Full-Duplex Systems

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Solution Overview

Problem

In communication systems that support In-band Full-Duplex (IFD), self-interference signals degrade reception performance, and existing Analog Self Interference Cancellation (ASIC) circuits are complex to implement due to the need for accurate modeling of self-interference channels, which increases implementation complexity and reduces performance.

Innovation Solution

A communication node is equipped with a Self Interference Cancellation (SIC) circuit comprising an Analog SIC (ASIC) circuit, a Hybrid SIC (HSIC) circuit, and a Digital SIC (DSIC) circuit, where the ASIC circuit cancels self-interference signals of a first magnitude, the HSIC circuit cancels signals of a second magnitude, and the DSIC circuit handles remaining signals, with coefficients determined using training signals to model interference transfer functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Analog SIC (ASIC) circuit is used to cancel self-interference signals, then self-interference cancellation performance is improved, but implementation complexity is increased due to the need for accurate channel modeling

Engineering Contradiction:
Improveself-interference cancellation performanceVSAvoidASIC circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the self-interference cancellation task into three separate circuits operating at different stages: Analog SIC (ASIC) for initial cancellation before ADC, Hybrid SIC (HSIC) for intermediate cancellation after ADC, and Digital SIC (DSIC) for final cancellation in baseband. This segmentation allows each circuit to be optimized for its specific function, reducing the overall complexity burden on any single circuit while maintaining comprehensive cancellation performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary Digital-to-Analog Converter (DAC) in the HSIC path that generates a synthesized self-interference signal to subtract from the received signal. This intermediary approach allows for flexible digital control of the cancellation process while maintaining analog signal processing benefits, bridging the gap between fully analog and fully digital approaches.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple SIC circuits (ASIC, HSIC, DSIC) are deployed, then self-interference cancellation performance is enhanced, but device complexity increases

Engineering Contradiction:
Improveself-interference cancellation performanceVSAvoidSIC circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the self-interference cancellation task into three separate circuits operating at different stages: Analog SIC (ASIC) for initial cancellation before ADC, Hybrid SIC (HSIC) for intermediate cancellation after ADC, and Digital SIC (DSIC) for final cancellation in baseband. This segmentation allows each circuit to be optimized for its specific function, reducing the overall complexity burden on any single circuit while maintaining comprehensive cancellation performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the cancellation architecture from traditional single-domain approaches to a multi-dimensional solution spanning analog, hybrid, and digital domains. By adding the HSIC circuit that operates in the intermediate domain between analog and digital, the system creates a three-layer cancellation structure that addresses self-interference at multiple signal processing stages, effectively tackling the problem from multiple dimensional perspectives.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10924257B2Method and apparatus for canceling self interference signal in communication system
Publication Date: 2021.02.16 ELECTRONICS & TELECOMM RES INST
  • US10924257B2 patent drawing
  • US10924257B2 patent drawing
  • US10924257B2 patent drawing

AI summary

Disclosed are a method and apparatus for canceling self-interference signals in a communication system. A first communication node includes a signal transmission unit configured to generate a first RF signal, an antenna module configured to transmit the first RF signal generated by the signal transmission unit and receive a second RF signal from a second communication node, a signal reception unit configured to process the second RF signal and a self-interference signal caused by the first RF signal, and an SIC circuit configured to cancel the self-interference signal. The SIC circuit includes a DSIC circuit for canceling the self-interference signal in a digital domain and an ASIC circuit and an HSIC circuit for canceling the self-interference signal in an analog domain. Accordingly, the performance of the communication system may be enhanced.