SiC Epitaxial Layer Co-Doping for Defect Reduction
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Solution Overview
Problem
Silicon carbide (SiC) semiconductor devices face challenges due to lower carrier mobility caused by residual defects, which affects the performance of power semiconductor devices intended for high-temperature operation and low energy loss.
Innovation Solution
A semiconductor device structure and manufacturing method involving co-doping of SiC with specific impurity combinations, such as Al and N, to form stable pair structures and trimers, which reduce strain and increase solid solubility limits, thereby improving carrier mobility and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If SiC is used for power semiconductor devices, then breakdown field strength and heat conductivity are improved, but carrier mobility deteriorates due to residual defects
Solution Approach 1:
The patent changes the doping parameters by introducing co-doping with specific impurity combinations (Al and N, or B and P) with controlled concentration ratios. This modifies the physical and chemical properties of the SiC crystal lattice, reducing residual defects and improving carrier mobility while maintaining the high breakdown field strength inherent to SiC materials.
Solution Approach 2:
The patent creates a composite doping structure by combining multiple impurity elements (p-type and n-type) in specific ratios within the SiC lattice. This composite approach allows the material to exhibit both high breakdown strength and improved carrier mobility, overcoming the limitations of single-element doping.
2Temperature
If SiC is used for high-temperature operation devices, then temperature resistance is improved, but energy loss increases due to lower carrier mobility
Solution Approach 1:
The patent modifies the material parameters through co-doping, changing the electrical properties of SiC to reduce energy loss. By controlling impurity concentrations and ratios, the device achieves both high-temperature operation capability and reduced energy loss, as the co-doped structure improves carrier transport efficiency.
3Quantity of substance
If conventional doping is used in SiC, then impurity concentration is increased, but solid solubility limit is exceeded causing defects
Solution Approach 1:
The patent changes the fundamental parameter of impurity introduction by using co-doping mechanisms. The specific combination of p-type and n-type impurities with controlled ratios enables the system to achieve higher total impurity concentrations while maintaining crystal quality, as the paired impurities reduce lattice strain and prevent defect formation.
Solution Approach 2:
The patent converts the potential harm of exceeding solid solubility limits into a benefit by using co-doping. The paired impurity atoms (Al-N or B-P) effectively utilize the available doping capacity without creating excess defects, transforming the limitation into an opportunity for achieving both high impurity concentration and high manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The co-doping approach enhances carrier mobility, lowers resistance, and increases the solid solubility limits of impurities, resulting in improved performance and reliability of SiC semiconductor devices, including MOSFETs and IGBTs, with reduced strain and defects.
Implementation Method 1
co-doping of SiC with specific impurity combinations, such as Al and N, to form stable pair structures and trimers, which reduce strain and increase solid solubility limits
Data Source
AI summary
A semiconductor device of an embodiment includes: an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer provided on the first SiC epitaxial layer and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the concentration of the element A in the combination(s) being higher than 0.33 but lower than 1.0; n-type first and second SiC regions provided in the surface of the second SiC epitaxial layer; a gate insulating film; a gate electrode; a first electrode provided on the second SiC region; and a second electrode provided on the opposite side from the first electrode.