SiC Coated Focus Rings for Dry Etching Plasma Resistance
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Solution Overview
Problem
Semiconductor manufacturing parts, such as focus rings, face challenges in plasma resistance during dry etching processes, leading to potential damage and increased production costs due to the use of expensive SiC materials.
Innovation Solution
A semiconductor manufacturing part with a SiC deposition layer formed on a base material, using a chemical vapor deposition method at varying temperatures, and a stepped structure with curved or obtuse angled surfaces to enhance plasma resistance and reduce costs by maintaining a thin SiC deposition thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiC material is used for semiconductor manufacturing parts, then plasma resistance is improved, but manufacturing cost increases
Solution Approach 1:
The invention uses a composite structure consisting of a base material (graphite, SiC, or other semiconductor materials) combined with a SiC deposition layer. This composite approach provides the plasma resistance of SiC while allowing optimization of cost and performance by selecting appropriate base materials and controlling the thickness of the SiC layer.
Solution Approach 2:
The SiC deposition layer is applied selectively to specific surfaces or regions of the base material that require plasma resistance. The thickness of the SiC layer can be varied locally to provide adequate protection only where plasma exposure occurs, reducing overall material cost while maintaining necessary performance.
2Reliability
If SiC material is used for semiconductor manufacturing parts, then plasma resistance is improved, but productivity decreases
Solution Approach 1:
The composite structure of base material plus SiC deposition layer provides plasma resistance without requiring complete replacement of existing materials, allowing for easier integration into current manufacturing processes and maintaining productivity.
Solution Approach 2:
The invention controls the thickness of the SiC deposition layer within specific ranges (5-50 μm for focus rings, 1-10 μm for electrodes) to provide adequate plasma protection while minimizing material usage and processing time, thereby maintaining high productivity.
3Reliability
If SiC deposition layer thickness is increased, then plasma resistance is improved, but manufacturing cost increases
Solution Approach 1:
The invention optimizes the thickness of the SiC deposition layer to specific ranges (5-50 μm for focus rings, 1-10 μm for electrodes) that provide sufficient plasma resistance while minimizing material cost and deposition processing time, achieving the best balance between performance and cost.
Solution Approach 2:
The SiC deposition layer thickness is optimized for specific applications and exposure conditions, providing adequate protection only where and where needed, rather than uniformly thick layers throughout, thereby reducing overall manufacturing cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces production costs and enhances productivity by preventing base material exposure to plasma, ensuring high-quality semiconductor products through a thin SiC deposition layer and residual stress removal.
Implementation Method 1
forming the SiC deposition layer may be performed using a chemical vapor deposition (CVD) method
Implementation Method 2
performing a residual stress removal operation of performing heat treatment at 1500° C. to 2000° C. after forming the SiC deposition layer
Data Source
AI summary
The present invention relates to semiconductor manufacturing parts used in a dry etching process. Semiconductor manufacturing parts comprising a SiC deposition layer, of the present invention, comprises: a base material; and a SiC deposition layer formed on the surface of the base material, wherein the thickness ratio of the base material and the SiC deposition layer is 2:1 to 100:1.