SiC Composite Wafer Structure Without Bulk Substrate Thinning
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Solution Overview
Problem
The production of vertical power devices using monocrystalline silicon carbide (SiC) is hindered by the high cost and difficulty in sourcing large bulk substrates, and existing methods involving metal carrier substrates are not always compatible with electronic component production lines, requiring costly thinning processes.
Innovation Solution
A method involving a temporary graphite substrate with specific grain size, porosity, and thermal expansion characteristics, where a polycrystalline silicon carbide carrier layer is deposited, and a monocrystalline SiC working layer is transferred using molecular adhesion, followed by epitaxial growth and mechanical or chemical detachment to form a semiconductor structure without the need for significant substrate thinning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bulk substrates made of monocrystalline SiC are used, then high-quality semiconductor structures can be produced, but the cost increases and sourcing becomes difficult
Solution Approach 1:
The substrate is segmented into two distinct parts: a thin working layer made of monocrystalline SiC (providing high quality for semiconductor devices) and a thick carrier layer made of polycrystalline SiC (providing mechanical support and thermal management). This segmentation allows each layer to be optimized independently for its specific function, resolving the contradiction between quality and manufacturability.
Solution Approach 2:
The invention uses a composite substrate structure combining monocrystalline SiC and polycrystalline SiC layers. The monocrystalline layer provides the necessary electrical and structural quality for semiconductor devices, while the polycrystalline carrier layer provides mechanical strength and thermal conductivity at lower cost, achieving both high reliability and ease of manufacture.
2Reliability
If the back face of the substrate is thinned to reduce vertical electrical resistivity, then electrical performance improves, but material is lost and production cost increases
Solution Approach 1:
The substrate functions are segmented between the working layer and carrier layer. The thin working layer (optimized for electrical performance) handles the semiconductor devices and provides adequate vertical conduction, while the thick carrier layer (optimized for mechanical and thermal properties) provides structural support and heat dissipation, eliminating the need to thin the entire substrate and thus preventing material loss.
Solution Approach 2:
The carrier layer acts as an intermediary between the thin working layer and the external environment. It provides the mechanical strength and thermal management necessary for device operation without requiring the working layer to be thinned, thus preserving the working layer material while still achieving the necessary electrical and thermal performance.
3Stability of the object's composition
If metal carrier substrates are used, then substrate compatibility with thermal expansion is improved, but compatibility with electronic component production lines deteriorates and additional thinning processes are required
Solution Approach 1:
The carrier layer is made of polycrystalline SiC, which has a coefficient of thermal expansion similar to monocrystalline SiC. This homogeneity in thermal expansion properties between the carrier layer and working layer eliminates thermal stress during temperature cycling and allows the entire structure to be processed together on standard semiconductor production lines without compatibility issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of high-quality, cost-effective semiconductor structures with vertical electrical conduction, reducing material loss and maintaining high-temperature compatibility, thus addressing the limitations of existing methods while ensuring reliable performance and economic viability.
Implementation Method 1
depositing, directly on a front face of the temporary substrate, a carrier layer made of polycrystalline silicon carbide
Implementation Method 2
depositing, directly on a front face of the temporary substrate, a carrier layer made of polycrystalline silicon carbide
Implementation Method 3
transferring a working layer made of monocrystalline silicon carbide to the carrier layer, directly or via an intermediate layer, to form a composite structure, the transfer implementing bonding by molecular adhesion
Implementation Method 4
a step of forming an active layer on the working layer
Data Source
AI summary
A method for producing a semiconductor structure, comprises: a) providing a temporary substrate made of graphite having a grain size of between 4 microns and 35 microns, a porosity of between 6 and 17%, and a coefficient of thermal expansion of between 4×10-6/° C. and 5×10-6/° C.; b) depositing, on a front face of the temporary substrate, a carrier layer made of polycrystalline silicon carbide having a thickness of between 10 microns and 200 microns, c) transferring a working layer made of monocrystalline silicon carbide to the carrier layer to form a composite structure, the transfer implementing bonding by molecular adhesion, d) forming an active layer on the working layer, e) and removing the temporary substrate to form the semiconductor structure, the structure including the active layer, the working layer and the carrier layer. A composite structure is obtained in an intermediate step of the production method.