Silicon Carbide Substrate Crystal Axis Alignment via Epitaxial Marking

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Solution Overview

Problem

Conventional methods for forming patterns on silicon carbide substrates rely on primary orientation flats, which can result in inaccuracies due to variations in crystal axis alignment among different wafer manufacturers and within the same substrate, leading to deviations in semiconductor device characteristics.

Innovation Solution

A method involving the formation of an epitaxial layer on a silicon carbide substrate, detection and creation of a mark indicating the crystal axis direction within a 0.5-degree margin of error, and using this mark to align subsequent patterns, such as trenches, ensuring accurate alignment parallel to the crystal axis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If primary orientation flats are used for pattern alignment, then the alignment process is simple, but the alignment accuracy deteriorates due to variations in crystal axis alignment among different wafer manufacturers and within the same substrate

Engineering Contradiction:

Improvealignment process simplicityVSAvoidalignment accuracy

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming an epitaxial layer on the silicon carbide substrate before pattern formation. This epitaxial layer contains stacking faults that serve as pre-established alignment markers, eliminating the need to rely on primary orientation flats. The stacking faults are created during the epitaxial growth process, providing accurate crystal axis references before the actual pattern alignment is performed.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary element - the epitaxial layer with stacking faults - that mediates between the substrate and the patterns to be formed. The stacking faults in the epitaxial layer act as intermediate alignment markers that provide accurate crystal axis references, bridging the gap between the substrate's primary orientation flats and the required pattern alignment precision.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of operation

If primary orientation flats are used for alignment, then the process is straightforward, but deviations in semiconductor device characteristics occur due to alignment inaccuracies

Engineering Contradiction:

Improvealignment operation simplicityVSAvoidsemiconductor device characteristic consistency

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The epitaxial layer is formed in advance with intentionally created stacking faults that serve as reliable alignment markers. This preliminary action ensures that accurate crystal axis references are available before device fabrication begins, thereby maintaining both operational simplicity and device characteristic consistency.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The stacking faults in the epitaxial layer serve as intermediary alignment markers that provide consistent and accurate crystal axis references. These intermediaries eliminate the variability inherent in primary orientation flats, ensuring reliable alignment across different wafers and manufacturers while maintaining straightforward alignment operations.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Manufacturing precision

If higher alignment accuracy is achieved using alternative methods, then manufacturing precision improves, but the process complexity increases

Engineering Contradiction:

Improvepattern formation accuracyVSAvoidalignment process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The epitaxial layer with stacking faults is formed as a preliminary step that integrates alignment marker creation into the existing fabrication process. This approach achieves high alignment accuracy without adding significant process complexity, as the stacking faults are created during the epitaxial growth stage rather than requiring separate alignment preparation steps.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10032724B2Silicon carbide semiconductor base, method of crystal axis alignment in silicon carbide semiconductor base, and method of manufacturing silicon carbide semiconductor device

Publication Date: 2018.07.24 FUJI ELECTRIC CO LTD

AI summary

On a first epitaxial layer of a first conductivity type or a second conductivity type provided on a front surface of a silicon carbide substrate, a mark indicating a crystal axis direction of the silicon carbide substrate within a margin of error of one degree is provided. The mark is created on the silicon carbide substrate by forming the first epitaxial layer of the first conductivity type or the second conductivity type on the front surface of the silicon carbide substrate, detecting a stacking fault from the first epitaxial layer, and confirming the crystal axis direction of the silicon carbide substrate from the detected stacking fault.