SiC Device Current Suppression Layer Reduces Parasitic Diode Area

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Solution Overview

Problem

In silicon carbide (SiC) semiconductor devices, the concentration of forward current in parasitic diodes leads to heat generation and conduction degradation, reducing the reliability of the devices.

Innovation Solution

The implementation of a current suppression layer and control electrode isolation insulating film structures within the semiconductor device, which reduces the cross-sectional area of the parasitic diode by embedding the current suppression layer in the current transport layer and using an insulating film to isolate the control electrode, thereby minimizing the forward current concentration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a p-type base region and p+ contact region are formed beneath the insulating film on the gate pad to prevent voltage floating, then the base region is electrically stabilized, but a large-area parasitic diode is created that causes forward current concentration and heat generation

Engineering Contradiction:
Improvevoltage stability of base regionVSAvoidforward current concentration in parasitic diode
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by forming a p-type isolation region with specific doping characteristics only in the peripheral circuit region beneath the insulating film, while maintaining the n-type drift layer in the active region. This localized doping approach stabilizes the base region voltage in the peripheral area without creating a large-area parasitic diode that would cause forward current concentration and heat generation.

Inventive Principle:
Principle #3Local quality

2Reliability

If the active region is isolated from peripheral circuits by insulating films and trenches, then interference between semiconductor elements and peripheral circuits is prevented, but the device structure becomes more complex

Engineering Contradiction:
Improveisolation effectivenessVSAvoidisolation structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the isolation function with the existing trench structure by forming both the isolation region and the trench in the same peripheral circuit region. The p-type isolation region is formed in the peripheral circuit region, and the trench is formed to isolate the active region from the peripheral circuit region, combining multiple isolation functions into a unified structure that reduces overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11276757B2Silicon carbide semiconductor device and method of manufacturing the same
Publication Date: 2022.03.15 FUJI ELECTRIC CO LTD
  • US11276757B2 patent drawing
  • US11276757B2 patent drawing
  • US11276757B2 patent drawing

AI summary

A silicon carbide semiconductor device includes an insulated-gate electrode structure that is formed inside a gate trench that goes through a base region and reaches a upper portion of a current transport layer to control a primary current flowing through the base region; a current suppression layer of the second conductivity type embedded within an upper portion of the current transport layer; a control electrode isolation insulating film filled into a control electrode isolation trench that goes through the base region and reaches an upper portion of the current suppression layer; and a control electrode pad disposed on the control electrode isolation insulating film, wherein an upper portion of the current suppression layer abuts a sidewall of the control electrode isolation insulating film, and a lower portion of the current suppression layer covers at least bottom corners of the control electrode isolation insulating film.