SiC Epitaxial Defect Classification Using PL Image Differencing
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Solution Overview
Problem
Conventional methods for manufacturing silicon carbide semiconductor devices fail to distinguish between defects in the substrate and epitaxial layers, leading to a decrease in the rate of conforming products due to the misclassification of chip regions containing non-killer defects from the epitaxial layer as defective.
Innovation Solution
A vertical silicon carbide semiconductor device is fabricated with a low concentration buffer layer and epitaxial layer grown on a silicon carbide substrate, featuring a transition layer and a high concentration buffer layer, and a method that uses photoluminescence imaging to differentiate between defects extending from the substrate and those generated during epitaxy, allowing for precise defect detection and classification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional defect inspection methods are used to detect all defects in SiC epitaxial wafers, then defect detection coverage is improved, but the rate of conforming products decreases due to misclassification of non-killer defects
Solution Approach 1:
The invention segments defects into two categories: killer defects (extending from substrate through epitaxial layer) and non-killer defects (confined to epitaxial layer). This segmentation allows differentiated handling where only killer defects lead to chip rejection, while non-killer defects are retained, thereby improving the rate of conforming products while maintaining appropriate defect detection coverage.
Solution Approach 2:
The invention introduces an intermediary classification process that uses PL inspection images to distinguish between killer and non-killer defects. By using the epitaxial layer as a visual reference overlay on the substrate defect map, the system mediates between comprehensive defect detection and productive chip utilization, preventing misclassification of non-killer defects as defective.
2Reliability
If all detected defects lead to chip rejection, then reliability is improved by removing defective chips, but productivity decreases due to excessive rejection of usable chips
Solution Approach 1:
The invention applies local quality assessment by evaluating defects based on their specific characteristics and location rather than applying a uniform rejection criterion. Killer defects that compromise device reliability are rejected, while non-killer defects that do not affect functionality are retained, achieving both reliability improvement and productivity maintenance through localized quality judgment.
Solution Approach 2:
The invention changes the decision parameter from binary defect presence to defect type classification (killer vs. non-killer). By using PL inspection to provide visual information about defect location and extent, the system transforms the rejection criterion based on defect parameters, allowing reliable chips to be identified and retained while only truly defective chips are rejected.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the rate of conforming products by accurately identifying and removing only defective chip regions with substrate-related defects, while retaining those with epitaxial layer defects, thereby improving the reliability and electrical characteristics of silicon carbide semiconductor devices.
Implementation Method 1
a first irradiation step (S1) of irradiating the entire silicon carbide substrate with a first ultraviolet light; a second irradiation step (S4) of irradiating a candidate region of the silicon carbide substrate with a second ultraviolet light at a higher intensity than the first excitation light
Data Source
AI summary
A method of manufacturing a vertical silicon carbide semiconductor device having an electrode on each of two main surfaces of a semiconductor chip in which an n-type low concentration buffer layer and an epitaxial layer are grown by epitaxy on a silicon carbide substrate. Defects extending from the silicon carbide substrate to the epitaxial layer and defects generated in the epitaxial layer during epitaxial growth are detected by a PL image of the n-type low concentration buffer layer; the defects generated in the epitaxial layer during the epitaxy are detected by a PL image of the epitaxial layer; the defects extending from the silicon carbide substrate to the epitaxial layer are detected by the difference between detection results; and semiconductor chips free of the defects extending from the silicon carbide substrate to the epitaxial layer are identified.