SiC Device Backside Resistivity for Body Diode Current Control
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Solution Overview
Problem
Existing silicon carbide semiconductor devices face fluctuations in device characteristics due to large current occurrences in the body diode of field-effect transistors, particularly at the boundary between the active and termination regions, which is undesirable for productivity and efficiency.
Innovation Solution
A silicon carbide semiconductor device configuration with a backside electrode that varies in resistivity across regions, forming a high-resistance region across the boundary between the active and termination regions to suppress current concentration and fluctuations, achieved through the formation of ohmic and non-ohmic contact regions and ion-implanted layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer layer is formed to suppress stacking fault extension, then reliability improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by creating a high-resistance region specifically at the boundary between the active region and termination region, rather than uniformly increasing buffer layer thickness across the entire device. This localized approach suppresses stacking fault extension at the critical boundary area while maintaining simpler overall device structure and avoiding excessive manufacturing complexity.
2Reliability
If buffer layer thickness is increased to suppress stacking faults, then reliability improves, but productivity deteriorates
Solution Approach 1:
Instead of increasing buffer layer thickness uniformly across the entire device which would reduce productivity, the patent creates a high-resistance region localized at the boundary between active and termination regions. This targeted approach suppresses stacking faults where they occur most frequently while maintaining faster and more efficient manufacturing processes.
Solution Approach 2:
The patent changes the electrical resistance parameter locally at the boundary region by forming a high-resistance region, rather than changing the physical thickness parameter of the buffer layer across the entire device. This parameter change achieves reliability improvement without the productivity penalty associated with increased buffer layer thickness.
3Power
If current density is increased in the body diode, then power handling capability improves, but device characteristics fluctuate due to stacking fault extension
Solution Approach 1:
The patent applies preliminary anti-action by pre-forming a high-resistance region at the boundary between active and termination regions before high current operation occurs. This preventive structure counteracts the tendency for stacking fault extension that would otherwise occur during high current operation, allowing the device to handle higher power without characteristic fluctuations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces current density fluctuations at the boundary, preventing device deterioration without increasing the thickness of the buffer layer, thus enhancing the reliability and productivity of the silicon carbide semiconductor devices.
Implementation Method 1
A region in which electric resistivity between the silicon carbide semiconductor substrate and the backside electrode takes a first value is regarded as a first resistance region. A region in which the electric resistivity between the silicon carbide semiconductor substrate and the backside electrode takes a second value greater than the first value is regarded as a second resistance region.
Implementation Method 2
achieved through the formation of ohmic and non-ohmic contact regions and ion-implanted layers
Data Source
AI summary
Fluctuations in device characteristics are suppressed by suppressing local occurrences of a large current through a body diode of a field-effect transistor. A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate, a semiconductor layer formed on the upper surface of the silicon carbide semiconductor substrate, and a backside electrode formed on the lower surface of the silicon carbide semiconductor substrate. A region in which electric resistivity takes a first value is regarded as a first resistance region, and a region where the electric resistivity takes a second value greater than the first value is regarded as a second resistance region. The second resistance region extends across a region boundary, i.e., the boundary between the active region and the termination region, in plan view.