SiC Device Outer Structure Relieves Electric Field Concentration
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Solution Overview
Problem
Existing silicon carbide (SiC) semiconductor devices with trench structures face challenges in achieving high drain breakdown voltage due to electric field concentration at the corners of recesses, which is exacerbated by the complexity and cost of inclined ion implantation required for forming P-type RESURF layers or guard rings.
Innovation Solution
The formation of an outer voltage-breakdown-resistant structure using a first recess, a first trench, and an electric field relief structure with a second conductivity type buried layer, which surrounds the transistor cell region without the need for inclined ion implantation, thereby relieving electric field concentration and enhancing drain breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If normal ion implantation is performed to form P-type RESURF layer, then the manufacturing process is simple, but the drain breakdown voltage is greatly reduced due to electric field concentration at the corner portion of the recess
Solution Approach 1:
The patent transitions from planar ion implantation to three-dimensional inclined ion implantation at 45 degrees. This dimensional change allows the ion beam to reach the side surfaces and corner portions of the recess that are inaccessible to normal vertical implantation, thereby forming the P-type RESURF layer at critical locations without requiring additional processing steps.
Solution Approach 2:
The patent changes the implantation angle parameter from 0 degrees (normal) to 45 degrees (inclined). This parameter modification enables the ion beam to penetrate to the side surfaces and corner portions of the recess, forming the P-type RESURF layer at these critical locations and relieving electric field concentration without complicating the manufacturing process.
2Reliability
If inclined ion implantation is performed to form P-type RESURF layer at side surface and corner portion of recess, then the drain breakdown voltage is increased, but the ion implantation process becomes complicated and time-consuming
Solution Approach 1:
The patent makes the single inclined ion implantation step perform multiple functions: it forms the P-type RESURF layer simultaneously at the bottom surface, side surfaces, and corner portions of the recess. This multi-functional approach eliminates the need for separate implantation steps for different locations, reducing overall process complexity despite the inclined angle requirement.
Solution Approach 2:
By utilizing inclined ion implantation at 45 degrees, the patent achieves comprehensive coverage of the recess structure (bottom, sides, and corners) in a single step. This dimensional approach consolidates multiple potential processing steps into one, reducing process complexity and time while ensuring the P-type RESURF layer is formed at all critical locations for high breakdown voltage.
3Ease of manufacture
If P-type RESURF layer is formed by normal ion implantation, then the manufacturing cost is low, but the electric field concentration at the corner portion reduces the drain breakdown voltage to 400V or less
Solution Approach 1:
The patent modifies the ion implantation angle parameter to 45 degrees, enabling the formation of the P-type RESURF layer at the side surfaces and corner portions of the recess. This single parameter change ensures comprehensive coverage of critical areas, relieving electric field concentration and achieving high breakdown voltage (1300V or more) without significantly increasing manufacturing cost or process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a high drain breakdown voltage while simplifying the manufacturing process by eliminating the need for inclined ion implantation, reducing manufacturing costs and improving the structural integrity of the SiC semiconductor device.
Implementation Method 1
the side surface of the first recess is provided by the second conductivity type buried layer to form an electric field relief structure
Implementation Method 2
a P-type RESURF layer J10 is formed by selective ion implantation of P-type impurities
Data Source
AI summary
A semiconductor device includes a silicon carbide semiconductor substrate, a transistor formed in a cell region of the semiconductor substrate, and a voltage-breakdown-resistant structure formed in a region which surrounds an outer periphery of the cell region. The semiconductor substrate includes a first conductivity type substrate, a first conductivity type drift layer on the first conductivity type substrate, a second conductivity type layer on the drift layer, and a first conductivity type layer on the second conductivity type layer. The voltage-breakdown-resistant structure includes a first recess which surrounds the outer periphery of the cell region and reaches the drift layer, a trench located at a side surface of the recess on an inner periphery of the recess, and a second conductivity type buried layer buried in the trench to provide the side surface of the first recess.