SiC Device p+ Protrusions Match Electric Field
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices experience avalanche breakdown and destruction due to impact ionization in the intermediate region, leading to reduced avalanche capability and surge current issues, as the hole current concentrates in the peripheral contact region rather than the active region.
Innovation Solution
The silicon carbide semiconductor device incorporates a p+-type region with protrusions facing the parallel pn layer in the intermediate region, along with higher impurity concentration n-type current spreading regions in the gate region, to match the electric field strength distribution with the active region, enhancing avalanche breakdown in the active region and reducing current concentration in the peripheral contact region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the conventional trench-embedding epitaxial technique is used to form parallel pn layer, then the semiconductor device can be manufactured with standard processes, but the hole current concentrates in the peripheral contact region causing avalanche breakdown and reduced avalanche capability
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentrations and structures: the active region has optimized doping profiles while the intermediate region features a p-type layer with specific characteristics. This local differentiation ensures that hole current is properly managed in each region, preventing peripheral contact region concentration and enhancing overall avalanche capability.
Solution Approach 2:
The patent employs parameter changes by adjusting impurity concentrations, layer thicknesses, and structural configurations in the intermediate region. Specifically, the p-type layer in the intermediate region has controlled doping levels and dimensions that modify the electric field distribution, thereby changing the current flow characteristics to prevent harmful concentration effects.
2Area of stationary object
If the n-type regions and p-type regions extend to the chip end side, then the active region area is maximized, but the electric field distribution becomes uneven causing breakdown voltage issues
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentrations and structures: the active region has optimized doping profiles while the intermediate region features a p-type layer with specific characteristics. This local differentiation ensures that hole current is properly managed in each region, preventing peripheral contact region concentration and enhancing overall avalanche capability.
Solution Approach 2:
The patent employs equipotentiality principles by designing the intermediate region structure to create more uniform electric field distribution. The p-type layer in the intermediate region acts as a field-modulating structure that balances the potential distribution across the chip, allowing the active region to extend to the chip end while maintaining adequate breakdown voltage through controlled field strength in the intermediate region.
3Ease of manufacture
If the intermediate region structure is simplified, then the manufacturing process is easier, but the avalanche breakdown performance deteriorates due to impact ionization
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentrations and structures: the active region has optimized doping profiles while the intermediate region features a p-type layer with specific characteristics. This local differentiation ensures that hole current is properly managed in each region, preventing peripheral contact region concentration and enhancing overall avalanche capability.
Solution Approach 2:
The patent employs composite material principles by combining multiple semiconductor layers with different conductivity types and doping profiles in the intermediate region. The composite structure of p-type and n-type layers creates favorable electric field distribution that prevents impact ionization-induced breakdown while maintaining manufacturing feasibility through standard epitaxial processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the avalanche capability of the silicon carbide semiconductor device by facilitating hole current flow in the active region, reducing current concentration in the peripheral contact region, and increasing the overall avalanche capability while maintaining breakdown voltage.
Implementation Method 1
match the electric field strength distribution with the active region, enhancing avalanche breakdown in the active region
Implementation Method 2
enhancing avalanche breakdown in the active region and reducing current concentration in the peripheral contact region
Data Source
AI summary
In an entire intermediate region between an active region and an edge termination region, a p+-type region is provided between a p-type base region and a parallel pn layer. The p+-type region is formed concurrently with and in contact with p+-type regions for mitigating electric field near bottoms of gate trenches. The p+-type region has portions that face, respectively, n-type regions and p-type regions of a parallel pn layer in a depth direction Z and at the portions, has protrusions that protrude toward the parallel pn layer. N-type current spreading regions extend in the entire intermediate region from the active region and are between the p+-type region and the parallel pn layer, positioned between protrusions of the p+-type region. The impurity concentration of the n-type current spreading regions in the gate region is higher than that of those in other regions. Thus, avalanche capability may be enhanced.