SiC Die Interruption Layer for Stacking Fault Suppression

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Solution Overview

Problem

Silicon carbide (SiC) semiconductor devices face challenges with electron-hole recombination and stacking fault growth at the interface between the substrate and epitaxial layer system, affecting electrical properties, particularly in high-voltage and high-current applications.

Innovation Solution

Incorporating an interruption layer, which can be amorphous, porous, or highly doped, embedded at a vertical distance from the interface between the SiC substrate and the epitaxial SiC layer system, to physically interrupt the crystal structure and reduce electron-hole recombination and stacking fault growth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an interruption layer is embedded into the SiC substrate or epitaxial layer system, then stacking fault growth is stopped and electron-hole recombination is reduced, but device complexity increases

Engineering Contradiction:
Improveelectrical propertiesVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

An interruption layer is introduced as an intermediary element between the SiC substrate and the epitaxial layer system. This layer physically interrupts the crystal structure to stop stacking fault growth and reduces electron-hole recombination at the interface, thereby improving electrical properties without requiring fundamental changes to the device architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The interruption layer is strategically positioned at specific locations where stacking faults originate and where electron-hole recombination occurs most strongly (at the interface between substrate and epitaxial layer system). This localized intervention addresses the problem at its source without modifying the entire device structure

Inventive Principle:
Principle #3Local quality

2Reliability

If the interruption layer is embedded at a vertical distance from the interface, then stacking fault growth is effectively stopped, but manufacturing precision requirements increase

Engineering Contradiction:
Improvestacking fault suppressionVSAvoidvertical distance positioning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The interruption layer is embedded into the SiC substrate before the epitaxial layer system is grown. This preliminary action allows the layer to be positioned at a controlled vertical distance from the future interface, enabling stacking fault suppression while maintaining manageable manufacturing precision requirements through process sequencing

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The interruption layer effectively shields the interface from recombination and stops the growth of stacking faults, enhancing the electrical properties and reliability of SiC semiconductor devices, particularly in high-voltage and high-current applications.

Implementation Method 1

The interruption layer is embedded either into the SiC substrate or into the epitaxial SiC layer system... it can form or serve as an 'interruption' of the crystal structure

Methodology Applied
Scientific EffectCrystal structure interruption:

Implementation Method 2

It can... 'interrupt' (e. g. strongly decrease) an electron-hole (eh) recombination, e. g. shield the interface between the substrate and the epitaxial layer system from the eh recombination

Methodology Applied
Scientific EffectElectron-hole recombination shielding:

Data Source

PatentUS20250022918A1Semiconductor die with a silicon carbide substrate
Publication Date: 2025.01.16 INFINEON TECHNOLOGIES AG
  • US20250022918A1 patent drawing
  • US20250022918A1 patent drawing
  • US20250022918A1 patent drawing

AI summary

The disclosure relates to a semiconductor die with a semiconductor device in a semiconductor body, the semiconductor body comprising a silicon carbide substrate; an epitaxial silicon carbide layer system on a first side of the silicon carbide substrate; an interruption layer; wherein the interruption layer is embedded either into the silicon carbide substrate or into the epitaxial silicon carbide layer system, in each case at a vertical distance from the first side of the silicon carbide substrate.