SiC Diode Flip-Chip Metallization for High-Current Leadframe Joining

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Solution Overview

Problem

There is a need for improved silicon carbide semiconductor devices with reduced lateral dimensions and enhanced current carrying capabilities to minimize overvoltages during switching operations, particularly for wide bandgap power devices like silicon carbide diodes.

Innovation Solution

A method involving a diode layer stack with a silicon carbide diode die, a copper layer, and a tin or indium containing layer, connected to a copper leadframe via a diffusion soldering process, forming an intermetallic compound layer comprising copper and tin, which enhances the semiconductor device's performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If silicon carbide devices are designed with reduced lateral dimensions to achieve higher power densities, then current carrying capabilities and power density are improved, but manufacturing complexity and reliability challenges increase

Engineering Contradiction:

Improvepower densityVSAvoidmanufacturing complexity

Core Design Contradiction:

PowerVSDevice complexity

Solution Approach 1:

The patent changes the metallization parameters by using a copper base layer with controlled thickness (5-20 micrometers) and specific resistivity ranges, combined with optimized solder layer compositions, to achieve reliable connections in compact devices with reduced lateral dimensions

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite metallization structures combining copper layers with tin-containing or indium-containing solder layers, creating a multi-layer composite system that provides both mechanical strength and electrical conductivity while enabling higher power densities in compact devices

Inventive Principle:

Principle #40Composite materials

2Reliability

If conventional metallization and wire bonding methods are used for connecting silicon carbide diodes, then manufacturing processes are simpler, but current carrying capabilities and performance are limited

Engineering Contradiction:

Improvecurrent carrying capabilityVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates the wire bonding step from the conventional manufacturing process, directly connecting the copper metallization layers through diffusion bonding, thereby simplifying the overall process while significantly improving current carrying capabilities and device reliability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical wire bonding system with a thermal diffusion bonding process, where copper atoms diffuse through the solder layer to create direct metallurgical bonds, achieving superior electrical and mechanical properties without mechanical wire connections

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If diffusion soldering process is implemented to connect diode layer stack to copper leadframe, then current carrying capabilities are enhanced, but manufacturing process complexity increases

Engineering Contradiction:

Improveconnection reliabilityVSAvoidprocess complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs preliminary actions by pre-depositing copper layers with controlled thickness and composition, and pre-applying solder layers with specific tin or indium content, before the diffusion bonding step, which facilitates the subsequent connection process and ensures reliable joints

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent optimizes diffusion soldering parameters including temperature ranges, time durations, and atmospheric conditions, while controlling copper layer thickness (5-20 micrometers) and solder composition, to achieve reliable connections with improved current carrying capabilities

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enables the fabrication of semiconductor devices with improved current carrying capabilities and reduced lateral dimensions, effectively minimizing overvoltages during switching operations, thereby enhancing the performance of silicon carbide power devices.

Implementation Method 1

performing a diffusion soldering process for connecting the diode layer stack with the layer stack to the first main surface of the die pad

Methodology Applied

Scientific EffectDiffusion soldering: Diffusion Welding

Data Source

PatentUS20240162125A1Diode layer stack flip-chip mounted to a leadframe by use of a copper nickel tin metallization stack and diffusion soldering

Publication Date: 2024.05.16 INFINEON TECH AUSTRIA AG

AI summary

A method for fabricating a diode layer stack comprises providing a diode layer stack including a silicon carbide diode die including a first main surface at an anode side of the diode die and a second main surface opposite to the first main surface at a cathode side of the diode die, a layer stack on the first main surface of the diode die, the layer stack including a copper layer disposed on the first main surface of the diode die, and a tin or indium containing layer disposed above the copper layer; providing a die pad comprising a copper leadframe including a first main surface and a second main surface opposite to the first main surface; and performing a diffusion soldering process for connecting the diode layer stack with the layer stack to the first main surface of the die pad.