SiC Schottky Diode Mesa Field Plate for Higher Breakdown Voltage

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Solution Overview

Problem

Wide-bandgap semiconductor devices face challenges in achieving high breakdown voltage due to electric field crowding at the edge of the main contact, leading to premature breakdown and dielectric failure, particularly in high power applications where conventional edge termination techniques are technologically difficult and costly to implement.

Innovation Solution

A power semiconductor device with a wide-bandgap semiconductor layer featuring a recessed mesa-type edge termination structure and a field plate, where the sidewall of the recess is aligned with the circumferential edge of the field plate, and a dielectric layer is used to separate the field plate from the semiconductor layer, reducing electric field crowding and enhancing breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a field plate is used to extend the depletion zone and reduce electric field crowding, then breakdown voltage is improved, but dielectric failure risk increases due to field crowding at the field plate edge

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddielectric failure risk
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The termination region is segmented into multiple zones: a first termination region with a first breakdown voltage and a second termination region with a second breakdown voltage. This segmentation allows different areas to handle different stress levels, distributing the electric field more evenly and preventing concentration at any single point.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor device are given different properties: the first termination region has a first doping concentration optimized for high voltage blocking, while the second termination region has a second doping concentration optimized for field distribution. This local optimization allows each region to perform its specific function effectively.

Inventive Principle:
Principle #3Local quality

2Reliability

If ion implantation is used to achieve edge termination, then termination efficiency is improved, but manufacturing cost and process complexity increase due to specialized equipment requirements

Engineering Contradiction:
Improvetermination efficiencyVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces the ion implantation process (which requires specialized equipment) with a doping diffusion process. The doping is introduced through a dielectric layer during standard semiconductor fabrication processes, eliminating the need for separate ion implantation facilities and high-temperature annealing ovens.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

A dielectric layer is introduced as an intermediary to deliver doping to the semiconductor substrate. This dielectric layer serves as a vehicle to transport dopants to specific regions during standard processing, replacing the direct ion implantation method and enabling use of conventional manufacturing equipment.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If the semiconductor layer is etched to form a mesa structure, then electric field crowding is reduced, but manufacturing precision requirements increase due to alignment sensitivity

Engineering Contradiction:
Improveelectric field distributionVSAvoidalignment precision
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The dielectric layer pattern serves as a self-aligning mask for the mesa etch process. The doping regions are defined by the dielectric layer geometry, and the mesa structure is automatically aligned to these regions during etching, eliminating the need for separate alignment steps and reducing precision requirements.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent combines multiple functions into the dielectric layer: it serves as a doping delivery vehicle, a pattern definition mask, and an alignment reference for the mesa structure. This merging of functions reduces the number of separate alignment operations needed and simplifies the manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces electric field crowding, increases breakdown voltage, and minimizes the risk of dielectric failure, enabling more efficient and cost-effective fabrication of high power semiconductor devices without the need for ion implantation.

Implementation Method 1

The field plate modifies the surface potential at the edge of the main contact (active region). As a result the depletion zone is extended and thus the electrical field as well.

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

a metal layer positioned upon a dielectric layer. The field plate modifies the surface potential

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS11888037B2Self-aligned field plate mesa FPM SiC schottky barrier diode
Publication Date: 2024.01.30 HITACHI ENERGY LTD
  • US11888037B2 patent drawing
  • US11888037B2 patent drawing
  • US11888037B2 patent drawing

AI summary

A power semiconductor device includes a wide-bandgap semiconductor layer having an active region and a termination region that laterally surrounds the active region. The wide-bandgap semiconductor layer has a first recess that is recessed from the first main side in the termination region and surrounds the active region and a second recess that is recessed from the first main side in the active region and is filled with an insulating material. A depth of the second recess is the same as a depth of the first recess. A field plate on the first main side of the wide-bandgap semiconductor layer exposes a first portion of the wide-bandgap semiconductor layer in the termination region.