SiC MOSFET Drift-Layer Segmentation for Schottky Current Capacity
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Solution Overview
Problem
The existing silicon carbide MOSFETs with built-in Schottky barrier diodes face limitations in maximizing current flow due to spatial constraints from well regions, which restrict the increase in current capacity without increasing the electrical field at the Schottky interface.
Innovation Solution
The silicon carbide semiconductor device incorporates a drift layer with separate well regions, source regions, contact regions, and current diffusion regions, along with a Schottky electrode, to enhance current flow without increasing the electrical field at the Schottky interface, achieved through specific impurity concentrations and layer formations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance from well regions is increased to enhance current flow in Schottky diode, then current capacity is improved, but electrical field at Schottky interface increases which reduces reliability
Solution Approach 1:
The patent segments the drift layer into multiple regions with different impurity concentrations: a first drift layer region with lower impurity concentration and a second drift layer region with higher impurity concentration. This segmentation allows the device to achieve both high current flow (in the high-concentration region) and low electrical field at Schottky interface (in the low-concentration region), resolving the technical contradiction between current capacity and interface reliability.
2Productivity
If well regions are positioned closer to increase current path, then current density is improved, but electrical field concentration increases at Schottky interface
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentrations within the drift layer. The first drift layer region has lower impurity concentration to reduce electrical field stress, while the second drift layer region has higher impurity concentration to increase current density. This local differentiation allows simultaneous optimization of both current density and electrical field distribution.
3Ease of manufacture
If chip area is reduced for cost reduction, then manufacturing cost is improved, but current flow capacity is limited by spatial constraints
Solution Approach 1:
The patent changes the impurity concentration parameter within the drift layer to optimize device performance. By adjusting the impurity concentration from lower in the first region to higher in the second region, the device achieves enhanced current flow capacity without requiring increased chip area, thus maintaining cost-effectiveness while improving electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for increased current density and reliability of the silicon carbide semiconductor device, reducing the size of the chip and operational resistance while maintaining high reliability and cost-effectiveness.
Implementation Method 1
a Schottky electrode formed on the first separation region to be Schottky-connected to the first separation region
Implementation Method 2
electrical field on a Schottky interface increases with increasing distance from the well regions of the opposite conductivity type
Implementation Method 3
well regions of a second conductivity type formed separately in a cross-sectional lateral direction in a surface layer of the drift layer
Data Source
AI summary
A silicon carbide semiconductor device according to the present disclosure includes: an n-type drift layer on an n-type semiconductor substrate; p-type well regions in a surface layer of the drift layer; an n-type first separation region between the well regions; an n-type second separation region; an n-type source region in each of the well regions; a p-type contact region; an n-type current diffusion region in a surface layer of each of the well regions; a gate insulating film; a gate electrode; an ohmic electrode; a Schottky electrode on the first separation region.


