SiC Semiconductor Edge Termination Segmentation
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Solution Overview
Problem
Conventional semiconductor devices face challenges in maintaining breakdown voltage and reducing ON resistance in edge termination regions due to decreased process margin of impurity concentration and increased electric field strength, particularly when using n-type CS regions.
Innovation Solution
A semiconductor device structure utilizing a wide bandgap semiconductor material like silicon carbide, with specific impurity concentration gradients and region configurations, including a trench structure and JTE regions, to manage electric fields and impurity concentrations, ensuring breakdown voltage and reducing ON resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If an n-type CS region is provided in the edge termination region to reduce ON resistance, then ON resistance decreases, but the process margin of impurity concentration decreases and breakdown voltage becomes difficult to maintain
Solution Approach 1:
The invention divides the edge termination region into multiple functional zones: a first edge termination region with an n-type CS region for reducing ON resistance, and a second edge termination region without the CS region for maintaining breakdown voltage. This segmentation allows each region to optimize its function independently, resolving the contradiction between low ON resistance and high breakdown voltage.
Solution Approach 2:
The invention applies different impurity concentration configurations to different local regions. The first edge termination region has higher impurity concentration (with n-type CS region) for low resistance, while the second edge termination region has lower impurity concentration for high breakdown voltage. This local differentiation resolves the contradiction by optimizing each region for its specific function.
2Loss of energy
If the impurity concentration of the n-type CS region is increased to reduce ON resistance, then ON resistance decreases, but the process margin decreases making it difficult to maintain breakdown voltage
Solution Approach 1:
The invention segments the edge termination region into two parts: the first region with n-type CS region where impurity concentration can be optimized for low ON resistance, and the second region without CS region that maintains breakdown voltage. This segmentation provides manufacturing process margin by decoupling the impurity concentration requirements of the two functions.
3Productivity
If a trench gate structure is used to increase cell density and current density, then productivity increases, but the electric field strength at the trench bottom increases requiring additional structures
Solution Approach 1:
The invention applies different structural configurations to different regions: the first edge termination region uses a trench gate structure for high cell density, while the second edge termination region uses a planar structure that provides lower electric field strength. This local differentiation resolves the contradiction between high productivity and reduced harmful electric field effects.
Data Source
AI summary
Each first p+-type region is provided between adjacent trenches embedded with a MOS gate and is in contact with a p-type base region. Second p+-type regions face a bottom and bottom corner portions of the trenches in a depth direction. An n-type CS region is a current spread layer provided between the first p+-type regions and the second p+-type regions. The n-type CS region is provided only in an active region and an end thereof is positioned at a boundary of the active region and an edge termination region. Further, the n-type CS region extends to be flush with or farther inward than an outermost first p+-type region. An outermost p++-type contact region extends from a drop between the active region and the edge termination region to the edge termination region and extends beyond the n-type CS region.