SiC Edge Termination Segmentation for Breakdown Voltage

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Solution Overview

Problem

Conventional edge termination structures for wide bandgap semiconductor devices require complex manufacturing steps and are susceptible to variations in impurity concentration, limiting their ability to achieve high breakdown voltage performance.

Innovation Solution

A semiconductor device with an edge termination structure comprising multiple regions of varying impurity concentrations, formed using photolithography and ion implantation, which reduces the number of manufacturing steps and disperses electric fields, thereby enhancing breakdown voltage performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If conventional edge termination structures (JTE or FLR) are used in wide bandgap semiconductor devices, then breakdown voltage can be improved, but the manufacturing complexity increases due to the requirement of microstructures of 1 μm or below and multiple dry etching processes

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing process complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The edge termination region is segmented into multiple discrete doped regions (first through fourth regions) with different impurity concentrations, arranged in a specific pattern rather than as continuous structures. This segmentation allows the use of standard lithography and ion implantation processes instead of complex dry etching, reducing manufacturing complexity while maintaining breakdown voltage performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the edge termination structure are assigned different impurity concentrations tailored to their specific functional requirements. The first region has higher impurity concentration for field control, while the second region has lower impurity concentration for voltage blocking, optimizing local electrical properties without requiring micro-scale fabrication precision

Inventive Principle:
Principle #3Local quality

2Strength

If conventional edge termination structures are used, then breakdown voltage is improved, but the device becomes susceptible to variations in manufacturing characteristics due to the precision required for microstructure formation

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing process stability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

By dividing the edge termination into discrete doped regions that can be formed by ion implantation through photolithography masks, the process becomes less sensitive to dimensional variations. The segmented structure allows each region to be independently controlled, reducing the cumulative effect of manufacturing variations on overall device performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the critical parameters from geometric dimensions (requiring 1 μm precision) to impurity concentration profiles, which can be more precisely controlled through ion implantation dosing. This parameter transformation makes the device performance less sensitive to lithography and etching variations

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure simplifies the manufacturing process, reduces impurity concentration variations, and achieves high breakdown voltage performance with fewer manufacturing steps, making it resistant to variations in manufacturing characteristics.

Implementation Method 1

formed using photolithography and ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS9722029B2Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2017.08.01 FUJI ELECTRIC CO LTD
  • US9722029B2 patent drawing
  • US9722029B2 patent drawing
  • US9722029B2 patent drawing

AI summary

A semiconductor device includes an n+ type silicon carbide substrate, and in the substrate an active region where primary current flows and an edge termination area surrounding the active region. The semiconductor device has a first p-type region and a second p-type region in the edge termination area, and the first p-type region includes therein a plurality of third p-type regions, and the second p-type region includes therein a plurality of fourth p-type regions. The widths between the respective plurality of third p-type regions and the widths between the respective plurality of fourth p-type regions become greater further away from the active region.