SiC Surface Electrode Layout for High-Voltage Discharge Suppression

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Solution Overview

Problem

Conventional semiconductor devices face challenges in measuring electric characteristics due to discharge issues in the atmosphere, particularly when trying to improve the discharge starting voltage and increase the number of chips obtained from a single wafer.

Innovation Solution

The semiconductor device incorporates a first conductive-type SiC layer with a voltage relaxing layer and an insulating layer, which are strategically positioned to reduce the voltage burden on the atmosphere during electric characteristic measurements, allowing for a wider pad area and increased chip density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the pad area of the surface electrode is widened to improve discharge starting voltage, then the discharge performance is improved, but the number of chips obtained from one wafer decreases

Engineering Contradiction:

Improvedischarge starting voltageVSAvoidnumber of chips per wafer

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The invention introduces a voltage relaxing layer that divides the high voltage burden into multiple segments: the atmosphere layer, the voltage relaxing layer, and the insulating layer. This segmentation allows each layer to handle a portion of the voltage stress, enabling the use of a wider pad area without increasing the discharge risk to a level that would reduce chip yield.

Inventive Principle:

Principle #1Segmentation

2Measurement precision

If the maximum applied voltage is increased to generate 1000 V or more potential difference for electric characteristic measurement, then the measurement capability is improved, but discharge occurs between the dicing region and surface electrode

Engineering Contradiction:

Improveelectric characteristic measurement capabilityVSAvoiddischarge between dicing region and surface electrode

Core Design Contradiction:

Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The voltage relaxing layer acts as an intermediary between the high-voltage surface electrode and the dicing region. It provides an additional insulation barrier that prevents direct discharge, allowing the application of 1000 V or more potential difference for accurate electric characteristic measurement without harmful discharge occurring.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If the distance from the end of pad area to the dicing region is reduced to increase chip density, then the chip yield is improved, but the discharge starting voltage decreases

Engineering Contradiction:

Improvechip yieldVSAvoiddischarge starting voltage

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The invention creates a composite insulation structure consisting of the atmosphere, voltage relaxing layer, and insulating layer. This composite structure provides enhanced discharge prevention capability, allowing the distance between pad area and dicing region to be reduced for higher chip yield while maintaining adequate discharge starting voltage through the combined protection of multiple layers.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents discharge between the dicing region and the surface electrode, enabling a lower discharge starting voltage while maintaining the required maximum applied voltage, thus allowing for a wider pad area and increased chip yield.

Implementation Method 1

forming a second conductive-type voltage relaxing layer with a width wider than that of the dicing region along the dicing region so as to be across the device regions adjacent to each other

Methodology Applied

Scientific EffectVoltage relaxation:

Implementation Method 2

forming an insulating layer on the SiC wafer so as to cover the voltage relaxing layer

Methodology Applied

Scientific EffectElectrical insulation: Dielectric

Implementation Method 3

measuring electric characteristics of the semiconductor device structure of the device regions by applying a maximum applied voltage (BV) that generates a potential difference of 1000 V or more between the surface electrode and the SiC wafer

Methodology Applied

Scientific EffectAtmospheric breakdown: Townsend Discharge

Data Source

PatentUS12278262B2Semiconductor device, and method for manufacturing semiconductor device

Publication Date: 2025.04.15 ROHM CO LTD

AI summary

[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.