Silicon Carbide Epitaxial Surface CMP for Dislocation Pit Removal

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Solution Overview

Problem

The propagation of crystallographic defects, particularly TSDs, from the substrate to the epitaxial layer in silicon carbide semiconductor devices leads to surface pits, reducing electrical performance and reliability, and increasing production costs due to lower yields and high leakage currents, which is critical in high-voltage and high-temperature applications like the automotive field.

Innovation Solution

An additional Chemical Mechanical Polishing (CMP) step is introduced using a particle-free polishing compound with a pH lower than 5, which removes a thin surface layer to eliminate surface pits and reduce roughness, optimizing the epitaxial layer surface for subsequent processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If epitaxial growth is performed on silicon carbide substrate, then semiconductor device can be manufactured with high-voltage and high-temperature characteristics, but crystallographic defects propagate from substrate to epitaxial layer causing surface pits that reduce device reliability and yield

Engineering Contradiction:
Improvedevice reliabilityVSAvoidsurface quality of epitaxial layer
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A buffer layer is formed on the silicon carbide substrate before performing epitaxial growth of the semiconductor layer. This preliminary action prevents propagation of threading screw dislocations from the substrate to the epitaxial layer, thereby avoiding surface pits and improving both device reliability and surface quality without sacrificing the high-voltage and high-temperature characteristics

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer layer acts as an intermediary between the silicon carbide substrate and the epitaxial layer. It selectively blocks crystallographic defects (threading screw dislocations) while allowing the epitaxial growth to proceed, thus mediating between the substrate's inherent defects and the requirement for high-quality surface for device reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If threading screw dislocations propagate to epitaxial layer surface, then device can be manufactured, but surface pits are generated that increase leakage current and reduce yield

Engineering Contradiction:
Improveproduction yieldVSAvoidleakage current
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The buffer layer is formed in advance on the substrate before epitaxial growth. This preliminary structure prevents threading screw dislocations from reaching the epitaxial layer surface, thereby eliminating surface pits that would otherwise generate leakage current and reduce production yield

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer layer, which might be considered an additional manufacturing step, actually converts the harmful effect of substrate defects into a beneficial outcome by blocking dislocation propagation. This transforms the problematic interface between substrate and epitaxial layer into a controlled structure that improves both yield and reduces leakage current

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The CMP process effectively removes surface defects, reduces surface roughness, and prepares the epitaxial layer for improved oxide growth, enhancing electrical and physical characteristics, increasing yield, and reducing manufacturing costs while ensuring high reliability and low failure rates.

Implementation Method 1

a process step, in particular immediately after the aforesaid epitaxial growth step, of chemical mechanical polishing of the top surface of the epitaxial layer formed on the substrate

Methodology Applied
Scientific EffectChemical Mechanical Polishing:

Implementation Method 2

using a polishing compound free of particles and having a pH lower than 5

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 3

chemical mechanical polishing

Methodology Applied
Scientific EffectMechanical abrasion: Abrasion

Implementation Method 4

for example a dielectric layer grown via surface oxidation

Methodology Applied
Scientific EffectSurface oxidation: Oxidation

Data Source

PatentEP3937209B1Process for manufacturing a silicon carbide semiconductor device having improved characteristics
Publication Date: 2024.12.18 STMICROELECTRONICS SRL
  • EP3937209B1 patent drawingFigure 1~2A
  • EP3937209B1 patent drawingFigure 2B~4B
  • EP3937209B1 patent drawingFigure 3

AI summary

A process for manufacturing a silicon carbide semiconductor device envisages the steps of: providing a silicon carbide wafer (21), having a substrate (22); and carrying out an epitaxial growth for formation of an epitaxial layer (23), having a top surface (23a), on the substrate (22). Following upon the step of carrying out an epitaxial growth, the process envisages the step of removing a surface portion of the epitaxial layer (23) starting from the top surface (23a) so as to remove surface damages present at the top surface (23a) as a result of propagation of dislocations (24) from the substrate (22) during the previous epitaxial growth and so as to define a resulting top surface (23a') substantially free of defects.