SiC Epitaxial Wafer Inverted Trapezoidal Defect Control

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Solution Overview

Problem

Current methods fail to adequately suppress the adverse effects of trapezoidal defects on semiconductor devices, particularly due to uncontrolled lower base step differences in SiC epitaxial wafers, which lead to current leakage and other device failures.

Innovation Solution

The SiC epitaxial wafer is grown on a substrate with an offset angle of 4 degrees or less, using a silane gas for etching and setting the C/Si ratio of source gases to 1.0 or less during epitaxial growth, with temperatures at 1,630° C. or lower, to control the shape of trapezoidal defects, resulting in inverted trapezoidal defects with shorter lower bases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional epitaxial growth methods are used, then SiC epitaxial wafers can be produced, but trapezoidal defects with long lower bases occur causing current leakage

Engineering Contradiction:
Improvedevice reliabilityVSAvoidtrapezoidal defect shape control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling epitaxial growth conditions including temperature (1,600-1,650°C), pressure (70-150 Torr), and gas flow rates to transform the trapezoidal defect morphology from conventional shapes with long lower bases to inverted shapes with short lower bases, thereby improving device reliability while maintaining manufacturing feasibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs inversion by growing inverted trapezoidal defects where the lower base is shorter than the upper base, opposite to conventional defects. This inversion is achieved through specific offset angle control (≤4°) and epitaxial growth parameter optimization, transforming the harmful defect geometry to reduce current leakage pathways

Inventive Principle:
Principle #13The other way round (Inversion)

2Manufacturing precision

If offset angle is increased to control defect shape, then inverted trapezoidal defects can be formed, but manufacturing complexity increases

Engineering Contradiction:
Improvetrapezoidal defect shape controlVSAvoidsubstrate preparation complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent uses parameter changes by optimizing the offset angle within a specific range (≤4°) and adjusting epitaxial growth parameters (temperature, pressure, gas composition) to achieve inverted trapezoidal defect formation without requiring complex substrate preparation or additional processing steps, thereby avoiding increased manufacturing complexity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces the adverse effects on semiconductor devices by minimizing the length of the lower base of trapezoidal defects, thereby suppressing current leakage and other issues, and allows for the production of high-quality SiC epitaxial wafers suitable for MOSFET devices.

Implementation Method 1

a SiC epitaxial layer is formed on a SiC single crystal substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

using a silane gas for etching

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10865500B2SiC epitaxial wafer and method for manufacturing SiC epitaxial wafer
Publication Date: 2020.12.15 RESONAC CORP
  • US10865500B2 patent drawing
  • US10865500B2 patent drawing
  • US10865500B2 patent drawing

AI summary

A SiC epitaxial wafer having a SiC epitaxial layer formed on a SiC single crystal substrate having an offset angle of 4 degrees or less in a<11-20>direction from a (0001) plane. A trapezoidal defect included in the SiC epitaxial wafer includes an inverted trapezoidal defect in which a length of a lower base on a downstream side of a step flow is equal to or less than a length of an upper base on an upstream side of the step flow. Also disclosed is a method for manufacturing the SiC epitaxial wafer.