SiC Epitaxial Film Dislocation Control via Inclined Wafer Curvature
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Solution Overview
Problem
Silicon carbide (SiC) epitaxial films suffer from high dislocation densities due to threading edge dislocation arrays, which degrade device properties and reliability, particularly in power and high-frequency devices, due to the propagation of misfit dislocations and basal plane dislocations from the substrate.
Innovation Solution
The use of a SiC single crystal wafer with a c-plane surface or a surface inclined by 0-10 degrees, combined with a convexly curved c-plane and controlled warpage, and a buffer region with a gradual carrier concentration increase, to reduce the density of threading edge dislocation arrays in the epitaxial film, achieved through specific epitaxial growth conditions including temperature and gas flow management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SiC single crystal wafers with c-plane surfaces are used for epitaxial growth, then the manufacturing process is simple and well-established, but threading edge dislocation arrays form in the epitaxial film, increasing dislocation density and degrading device properties
Solution Approach 1:
The patent changes the surface inclination parameter of the SiC single crystal wafer from the conventional c-plane (0 degrees) to a surface inclined at 0-10 degrees relative to the c-plane. This parameter change prevents the formation of threading edge dislocation arrays by altering the stress distribution and dislocation propagation dynamics during epitaxial growth, thereby reducing dislocation density in the epitaxial film while maintaining manufacturing feasibility.
Solution Approach 2:
The patent introduces convex curvature to the SiC single crystal wafer surface, replacing the conventional flat c-plane surface. This curvature modification changes the stress distribution pattern during epitaxial growth, preventing the linear propagation of dislocations that forms threading edge dislocation arrays. The curved surface geometry disrupts the conditions necessary for dislocation array formation, thereby improving epitaxial film quality.
2Stress or pressure
If misfit dislocations are allowed to elongate to alleviate stress at the interface, then stress relief is achieved, but threading edge dislocation arrays are formed, increasing dislocation density
Solution Approach 1:
By changing the surface inclination parameter to 0-10 degrees relative to the c-plane, the patent modifies the stress distribution at the wafer-epitaxial film interface. This parameter change allows stress relief without the formation of threading edge dislocation arrays, as the inclined surface geometry alters the propagation path and conditions for dislocation elongation.
Solution Approach 2:
The convex curvature of the wafer surface redistributes the interface stress more uniformly, preventing the concentration of stress that drives misfit dislocation elongation into threading edge dislocation arrays. The curved geometry transforms the stress relief mechanism, allowing stress accommodation without forming harmful dislocation structures in the epitaxial film.
3Manufacturing precision
If threading edge dislocation arrays are present in the epitaxial film, then dislocation density increases, but device reliability and performance are degraded
Solution Approach 1:
The patent applies a surface inclination parameter of 0-10 degrees relative to the c-plane, which fundamentally changes the dislocation propagation dynamics during epitaxial growth. This parameter change reduces threading edge dislocation array formation, achieving low dislocation density (<10 arrays/cm²) in the epitaxial film, thereby ensuring high device reliability and performance.
Solution Approach 2:
The convex curvature of the wafer surface prevents the linear propagation and organization of dislocations into arrays. By disrupting the geometric conditions necessary for threading edge dislocation array formation, the curved surface achieves low dislocation density in the epitaxial film, directly improving device reliability and performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the dislocation array density to 10 arrays/cm2 or less, enhancing the quality and reliability of SiC epitaxial films by minimizing stress and misfit dislocation conversion during epitaxial growth.
Implementation Method 1
SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer
Data Source
AI summary
An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.