SiC Epitaxial Transistor Structure for Higher Electron Mobility

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Silicon carbide power devices face challenges in achieving high electron mobility due to the anisotropic nature of their hexagonal crystal structure, which affects on-state resistance and power consumption.

Innovation Solution

A semiconductor device manufacturing method involving a hexagonal crystal substrate with a photoresist etched at an angle between 30 to 60 degrees to expose a lattice plane parallel to the c-axis, allowing for epitaxial growth along this plane and the formation of a transistor structure with enhanced electron mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional epitaxial growth is performed on silicon carbide substrate, then the device can be manufactured, but electron mobility is limited due to anisotropic crystal structure

Engineering Contradiction:
Improveelectron mobilityVSAvoidcrystal orientation control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing selective etching of the substrate surface before epitaxial growth to expose the desired crystal plane orientation. The substrate undergoes preliminary etching to reveal the (11-20) or (1-100) lattice planes, which are then used as the growth template for high electron mobility epitaxial layers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the crystal orientation parameter by controlling the etching process to expose specific lattice planes ((11-20) or (1-100)) that are parallel to the c-axis. This parameter change in crystal plane orientation directly enables higher electron mobility in the subsequent epitaxial layer.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If photoresist is etched at standard angles, then the process is simple, but the desired lattice plane exposure is not achieved

Engineering Contradiction:
Improvelattice plane exposureVSAvoidphotoresist processing
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a specific angled photoresist pattern (30-60 degrees) that selectively exposes only the desired lattice planes on the substrate surface. This localized angular configuration ensures precise control over which crystal planes are exposed for epitaxial growth.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces angular dimensionality by tilting the photoresist pattern at 30-60 degrees relative to the substrate surface, rather than using standard planar alignment. This angular dimension enables selective exposure of lattice planes that are parallel to the c-axis, achieving the desired crystal orientation control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in a transistor structure with increased electron mobility parallel to the c-axis, reducing on-state resistance and power consumption, thereby improving the performance of silicon carbide power devices.

Implementation Method 1

the lattice plane is etched by using a developed photoresist

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

growing an epitaxial layer on the substrate such that the epitaxial layer is grown along the lattice plane parallel to the c-axis

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20250107189A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.03.27 HON YOUNG SEMICON CORP
  • US20250107189A1 patent drawing
  • US20250107189A1 patent drawing
  • US20250107189A1 patent drawing

AI summary

The semiconductor device includes a substrate, an epitaxial layer and a transistor structure. The substrate is a hexagonal crystal structure and has a top surface perpendicular to a c-axis. The top surface of the substrate includes a lattice plane that is parallel to the c-axis, in which the lattice plane is etched by using a developed photoresist, and an included angle between the top surface of the developed photoresist and the substrate is in a range from 30 degree to 60 degree. The epitaxial axis is located on the lattice plane. The transistor structure is located in the epitaxial layer, on the epitaxial layer and on a surface facing away from the epitaxial layer.