SiC Epitaxial Wafer Growth via Gas Interruption
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Solution Overview
Problem
Conventional silicon carbide (SiC) epitaxial wafer manufacturing methods face challenges in suppressing surface defects like step bunching when transitioning from a first growth temperature to a higher second growth temperature, particularly with SiC bulk substrates having an off-angle of 4°, which degrades the quality of SiC power devices.
Innovation Solution
A method involving a first epitaxial growth at a temperature of 1480° C. or higher and 1530° C. or lower on a SiC bulk substrate with an off-angle of less than 5°, followed by stopping the supply of Si and C supply gases during the temperature increase to the second growth temperature, and then resuming gas supply for the second epitaxial growth at the higher temperature to prevent surface defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the temperature is increased from the first growth temperature to the second growth temperature while continuously supplying Si and C supply gases, then the second epitaxial growth can be performed at high speed, but surface defects such as step bunching occur during the temperature rise
Solution Approach 1:
The patent applies preliminary action by stopping the supply of Si and C supply gases before increasing the temperature from the first growth temperature to the second growth temperature. This prevents the formation of surface defects such as step bunching that would occur if gases were supplied during temperature rise. After the temperature increase is complete and stabilized at the second growth temperature, the gas supply is resumed to enable high-speed epitaxial growth without surface defects.
2Adaptability or versatility
If a SiC bulk substrate with an off-angle of 4° is used for epitaxial growth, then the current mainstream substrate specification is met, but surface defects such as step bunching occur during temperature rise that degrade device characteristics
Solution Approach 1:
The patent addresses the substrate specification compatibility issue by implementing a preliminary action: stopping the supply of Si and C supply gases before increasing the temperature when using SiC bulk substrates with an off-angle of 4°. This prevents the formation of step bunching and other surface defects that would otherwise occur during temperature rise on these substrates, thereby maintaining device characteristics while using the current mainstream substrate specification.
3Manufacturing precision
If the first epitaxial growth is performed at a temperature of 1480° C. or higher and 1530° C. or lower, then the surface defects on the SiC bulk substrate are suppressed, but the growth speed is reduced
Solution Approach 1:
The patent applies segmentation by dividing the epitaxial growth process into two distinct stages: a first epitaxial growth stage performed at a temperature of 1480° C. or higher and 1530° C. or lower to suppress surface defects and achieve low defect density, and a second epitaxial growth stage performed at a higher temperature to achieve high growth speed. By segmenting the process into these two stages with different temperature conditions, the patent successfully achieves both low defect density and high productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the occurrence of surface defects such as step bunching, enabling the production of SiC epitaxial wafers with improved surface shape and throughput, reducing defect density to 30/cm2 or less, and enhancing the quality and yield of SiC power devices.
Implementation Method 1
a SiC epitaxial layer being an active region of the device needs to be epitaxially grown on a SiC bulk substrate by a thermal chemical vapor deposition (CVD)
Implementation Method 2
a SiC epitaxial layer being an active region of the device needs to be epitaxially grown on a SiC bulk substrate by a thermal chemical vapor deposition (CVD)
Implementation Method 3
a step-flow epitaxy in which the SiC bulk substrate having an off-angle of more than 0° is grown by the thermal CVD
Data Source
AI summary
A method for manufacturing a SiC epitaxial wafer includes: a first step of, by supplying a Si supply gas and a C supply gas, performing a first epitaxial growth on a SiC bulk substrate with a 4H—SiC(0001) having an off-angle of less than 5° as a main surface at a first temperature of 1480° C. or higher and 1530° C. or lower; a second step of stopping the supply of the Si supply gas and the C supply gas and increasing a temperature of the SiC bulk substrate from the first temperature to a second temperature; and a third step of, by supplying the Si supply gas and the C supply gas, performing a second epitaxial growth on the SiC bulk substrate having the temperature increased in the second step at the second temperature.