SiC Epitaxial Substrate Growth for Low Stacking Fault Density
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Solution Overview
Problem
Silicon carbide (SiC) epitaxial substrates suffer from defects such as dislocations, stacking faults, and line-shaped surface defects, which deteriorate the crystal quality and increase internal electrical resistance, leading to heat generation and device degradation in SiC-based power devices.
Innovation Solution
A silicon carbide epitaxial substrate is manufactured by growing a silicon carbide epitaxial layer on a (000-1) C-face silicon carbide substrate with a low basal plane dislocation density and surface roughness, using chemical vapor deposition with a controlled C/Si ratio between 1 and 1.6, and chemical mechanical polishing to reduce surface defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a silicon carbide epitaxial layer is grown on a conventional silicon carbide substrate, then the epitaxial layer can be formed, but dislocations and stacking faults propagate from the substrate to the epitaxial layer, deteriorating crystal quality
Solution Approach 1:
The patent applies parameter changes by controlling the C/Si ratio in the gas phase during epitaxial growth within the specific range of 0.5 to 2.0, and maintaining the substrate temperature between 1600°C and 1800°C. These parameter optimizations prevent the propagation of dislocations and stacking faults from the substrate to the epitaxial layer, achieving low defect density while maintaining high crystal quality
Solution Approach 2:
The patent employs preliminary action by performing chemical mechanical polishing on the substrate surface before epitaxial growth to reduce surface roughness to 1 nm or less, and by conducting a low-temperature growth phase (1600°C to 1700°C) before the main high-temperature growth phase. This preliminary preparation prevents defect propagation and ensures high crystal quality in the final epitaxial layer
2Ease of manufacture
If basal plane dislocations are present in the silicon carbide substrate, then the substrate can be manufactured, but stacking faults occur in the epitaxial layer during bipolar operation, increasing internal electrical resistance and causing heat generation
Solution Approach 1:
The patent applies parameter changes by controlling the C/Si ratio in the gas phase within 0.5 to 2.0 and substrate temperature between 1600°C and 1800°C during epitaxial growth. These optimized parameters suppress the expansion of basal plane dislocations into stacking faults during bipolar operation, preventing increased internal electrical resistance and heat generation while maintaining substrate manufacturability
Solution Approach 2:
The patent converts the potentially harmful effect of basal plane dislocations into a beneficial outcome by using specific growth parameters (C/Si ratio of 0.5 to 2.0 and temperature of 1600°C to 1800°C) that prevent dislocation expansion into stacking faults. This approach maintains substrate manufacturability while eliminating the harmful bipolar degradation effect
3Productivity
If line-shaped surface defects are present on the epitaxial layer surface, then the epitaxial growth can proceed, but the defects accompany stacking faults and reduce the overall quality of the epitaxial layer
Solution Approach 1:
The patent employs preliminary action by performing chemical mechanical polishing on the substrate surface before epitaxial growth to reduce surface roughness to 1 nm or less, and by conducting a low-temperature growth phase (1600°C to 1700°C) before the main high-temperature growth phase. This preliminary preparation prevents the formation and propagation of line-shaped surface defects and accompanying stacking faults, achieving high surface quality without sacrificing productivity
Solution Approach 2:
The patent applies parameter changes by controlling the C/Si ratio in the gas phase within 0.5 to 2.0 and substrate temperature between 1600°C and 1800°C during epitaxial growth. These optimized parameters suppress the formation of line-shaped surface defects and accompanying stacking faults, achieving high surface quality while maintaining productive growth rates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces line-shaped surface defect and stacking fault densities, improving the crystal quality of the silicon carbide epitaxial layer, thereby enhancing the reliability and performance of SiC-based power devices.
Implementation Method 1
growing a silicon carbide epitaxial layer on a (000-1) C-face silicon carbide substrate
Implementation Method 2
chemical mechanical polishing to reduce surface defects
Data Source
AI summary
A method for manufacturing a silicon carbide epitaxial substrate which has a first surface which is a (000-1) C-face, a silicon carbide epitaxial layer located on the first surface of the silicon carbide substrate, and a line-shaped surface defect density on a top surface of the silicon carbide epitaxial layer is less than 1.0 cm−2 and a stacking fault density is less than 1.2 cm−2.