SiC Epitaxial Substrate Dislocation Conversion via Segmented Buffer
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Solution Overview
Problem
Existing silicon carbide semiconductor devices face degradation due to basal plane dislocations and interface dislocations, which lead to shifts in forward voltage and reduced reliability, as current techniques either create interface dislocations or fail to effectively convert basal plane dislocations into edge dislocations.
Innovation Solution
A silicon carbide epitaxial substrate with a stacked structure comprising a first epitaxial layer with a basal-plane-dislocation conversion rate of less than 95% and a second epitaxial layer with a conversion rate of more than 98%, gradually converting basal plane dislocations into edge dislocations, thereby reducing unfavorable dislocations and preventing stacking fault expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a layer with high impurity concentration is formed onto a silicon carbide substrate to reduce basal plane dislocations, then the basal plane dislocation density is reduced, but interface dislocations are generated due to stress at the interface
Solution Approach 1:
The buffer layer is divided into multiple sub-layers with progressively changing impurity concentrations (first sub-layer: 1×10^18 to 1×10^19 cm^-3, second sub-layer: 1×10^19 to 1×10^20 cm^-3, third sub-layer: 1×10^20 to 1×10^21 cm^-3). This gradual transition reduces stress concentration at interfaces, preventing interface dislocation generation while effectively converting basal plane dislocations to threading dislocations.
Solution Approach 2:
The impurity concentration parameter is systematically varied across different sub-layers of the buffer layer. By creating a gradient from lower to higher impurity concentrations, the lattice mismatch stress is gradually distributed, enabling effective dislocation conversion without generating new interface dislocations at the sharp boundaries that would occur with uniform high-concentration layers.
2Reliability
If temperature is fluctuated during crystal growth to apply thermal stress and convert basal plane dislocations, then basal plane dislocation conversion rate increases, but interface dislocations are generated due to thermal stress
Solution Approach 1:
Instead of fluctuating temperature during growth, the patent changes the impurity concentration parameter during crystal growth to apply controlled stress. The impurity concentration is increased stepwise across sub-layers, creating a gradual stress field that converts basal plane dislocations without the severe thermal stress that would generate interface dislocations at growth fronts.
3Reliability
If extreme changes in impurity concentration are applied during epitaxial growth to convert dislocations, then basal plane dislocation conversion is enhanced, but device degradation occurs due to interface dislocation
Solution Approach 1:
The buffer layer is segmented into multiple sub-layers with intermediate impurity concentration steps rather than a single extreme change. This segmentation creates multiple gradual transitions, distributing the stress field and preventing the formation of interface dislocations that would result from abrupt, extreme concentration changes between substrate and drift layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a highly reliable semiconductor device with stable properties by reducing dislocations originating from expanded stacking faults, preventing device degradation, and maintaining device reliability without requiring extreme changes in impurity concentration or temperature during growth.
Implementation Method 1
The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.
Data Source
AI summary
An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.