SiC Transistor Gate-Source Clamp Circuit for Short-Circuit Protection

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Solution Overview

Problem

Silicon carbide transistors used in power electronics are prone to failure due to short circuit events, with a shorter withstand time compared to their silicon counterparts, necessitating improved short circuit protection mechanisms.

Innovation Solution

Incorporating a short circuit protection circuitry between the control and current terminals of the transistor semiconductor die, utilizing diodes with a negative temperature coefficient to provide a voltage drop that increases in normal operation and decreases during a short circuit, thereby protecting the transistor without interfering with its normal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon carbide transistors are used to provide higher blocking voltage and lower on-state resistance, then device performance is improved, but short circuit withstand time is reduced

Engineering Contradiction:
Improvedevice performanceVSAvoidshort circuit withstand time
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by incorporating a clamp circuit that proactively limits the gate-to-source voltage to a predetermined maximum value before a short circuit event occurs. This preventive measure ensures that during a short circuit, the voltage remains clamped at a safe level, extending the withstand time of the silicon carbide transistor without compromising its high-performance characteristics during normal operation.

Inventive Principle:
Principle #10Preliminary action

2Duration of action of moving object

If a voltage clamp circuit is added to protect against short circuits, then short circuit withstand time is improved, but device complexity increases

Engineering Contradiction:
Improveshort circuit withstand timeVSAvoiddevice complexity
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The patent employs an intermediary approach by introducing a clamp circuit as a separate protective component that mediates between the gate terminal and the source terminal. This intermediary circuit selectively activates only during abnormal voltage conditions, providing protection without interfering with the transistor's normal operation and minimizing the impact on device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the clamp circuit provides voltage drop protection, then short circuit protection is improved, but normal operation may be interfered with

Engineering Contradiction:
Improveshort circuit protectionVSAvoidnormal operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies dynamics by designing a clamp circuit with voltage-dependent characteristics that adapt its behavior based on operating conditions. During normal operation, the clamp circuit presents high impedance and remains inactive, allowing full signal swing and undisturbed transistor operation. During a short circuit event, the clamp circuit dynamically activates to clamp the voltage at a predetermined maximum value, providing protection only when needed.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Significantly enhances the short circuit withstand time of silicon carbide transistors, allowing them to operate safely during short circuit events without failing, while maintaining normal operational efficiency.

Implementation Method 1

utilizing diodes with a negative temperature coefficient to provide a voltage drop that increases in normal operation and decreases during a short circuit

Methodology Applied
Scientific EffectNegative temperature coefficient:

Data Source

PatentUS20230418319A1Semiconductor transistors having minimum gate-to-source voltage clamp circuits
Publication Date: 2023.12.28 WOLFSPEED INC
  • US20230418319A1 patent drawing
  • US20230418319A1 patent drawing
  • US20230418319A1 patent drawing

AI summary

Transistors are provided that comprise a silicon carbide based semiconductor layer structure, a first current terminal, a second current terminal, a gate terminal, and a minimum gate terminal-to-second current terminal voltage clamp circuit in the semiconductor layer structure that is coupled between the gate terminal and the second current terminal.