SiC Gate Drive Booster Circuit for High dV/dT Ringing Suppression
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Solution Overview
Problem
High voltage switching devices, such as SiC FETs, experience ringing feedback at the gate terminal due to high speed switching, which can damage or degrade the operation of these devices and coupled circuits, with existing mitigation techniques like active clamping and snubber circuits leading to increased power loss or reduced switching speeds.
Innovation Solution
A switching circuit and method that includes a booster circuit to detect a control signal and drive a current into the gate terminal of the transistor for a specified time before turning off, reducing ringing by temporarily reversing the current flow from the gate terminal when the voltage falls below a threshold, thereby minimizing gate voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high speed switching is used to improve switching speed, then productivity increases, but electrical feedback ringing occurs causing harmful effects
Solution Approach 1:
The booster circuit proactively drives additional current into the gate terminal before the transistor fully turns off, anticipating the ringing condition. This preliminary action maintains the gate voltage above the threshold during the critical transition period, preventing the feedback ringing from developing while preserving high switching speeds.
Solution Approach 2:
The booster circuit acts as an intermediary between the control circuit and the gate terminal. It detects the control signal and inserts itself to provide additional current drive, mediating the interaction between the control signal and the gate terminal to prevent ringing without compromising the high speed switching performance.
2Object-affected harmful factors
If existing mitigation techniques like active clamping and snubber circuits are used to reduce ringing, then harmful effects decrease, but power loss increases
Solution Approach 1:
The booster circuit uses the existing control signal to activate itself and provide the necessary current boost. It leverages the control circuit's own output to generate the corrective action, eliminating the need for separate active clamping or snubber circuits that would consume additional power. The system serves itself by using its control signal to prevent ringing.
3Object-affected harmful factors
If existing mitigation techniques are used to reduce ringing, then harmful effects decrease, but switching speed reduces
Solution Approach 1:
The booster circuit activates in advance during the gate voltage transition, providing current support before ringing can develop. This preliminary action prevents the need for slower mitigation techniques to kick in after ringing occurs, thereby maintaining high switching speeds while eliminating feedback ringing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively reduces electrical feedback ringing at the gate terminal of high voltage switching devices without inhibiting high speed or low energy loss operations, improving the reliability and efficiency of SiC FETs in power conversion applications.
Implementation Method 1
drive a current into the gate terminal of the transistor for a specified time before turning off
Data Source
AI summary
A switching circuit can help reduce electrical feedback ringing at a gate terminal of a transistor. The switching circuit can include a transistor circuit to switch an electrical signal and a control circuit to provide an actuation signal to the gate terminal of the transistor device. The switching circuit can also include a booster circuit that is disposed between the control circuit and the gate terminal of the transistor device. The booster circuit can be configured to detect a signal from the control circuit to turn off the transistor device and, responsive to the detected signal, drive a current into the gate terminal of the transistor device for a specified span of time before the transistor device turns off.