SiC Gate Insulating Film Stack for Trench Breakdown Reliability
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices with trench gate structures face dielectric breakdown issues due to high electric fields at the gate insulating films, leading to reduced reliability and shorter lifespan when p+-type regions are not provided near the gate trench bottoms, increasing manufacturing complexity and cost.
Innovation Solution
A method of manufacturing silicon carbide semiconductor devices with a multilayer gate insulating film structure comprising a LaAlO3 film formed by alternating atomic layer deposition of La2O3 and Al2O3, followed by a heat treatment at temperatures less than 900 degrees Celsius, which mitigates the electric field and enhances the gate insulating film reliability without the need for p+-type regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If p+-type regions are provided near the gate trench bottoms to mitigate electric field, then gate insulating film reliability is improved, but device structure and manufacturing process become more complex
Solution Approach 1:
The patent changes the material parameter of the gate insulating film by forming a multilayer structure with high-k film (LaAlO3) and silicon oxide film, thereby altering the electric field distribution characteristics without adding p+-type regions. This parameter change in film composition and structure resolves the contradiction by achieving field mitigation through material properties rather than structural additions.
Solution Approach 2:
The patent applies composite material principle by creating a multilayer gate insulating film combining LaAlO3 high-k film and silicon oxide film. This composite structure leverages the high dielectric constant of LaAlO3 to reduce electric field intensity at the gate trench bottom, achieving reliability improvement without increasing device structural complexity.
2Duration of action of stationary object
If p+-type regions are provided near the gate trench bottoms to mitigate electric field, then gate insulating film lifespan is improved, but manufacturing process becomes more complex and costly
Solution Approach 1:
The patent changes the deposition parameters and film composition by using atomic layer deposition to form a multilayer structure with controlled thicknesses of LaAlO3 and silicon oxide films. This parameter optimization achieves lifespan extension through enhanced dielectric properties without requiring additional ion implantation steps for p+-type regions, thereby maintaining manufacturing simplicity.
Solution Approach 2:
The patent extracts the essential function of p+-type regions (electric field mitigation) and implements it through a different mechanism - the high-k silicon oxide film alone provides sufficient field reduction. This extraction allows elimination of the complex p+-type region formation process while achieving the same protective effect for the gate insulating film.
3Ease of manufacture
If conventional single-layer gate insulating film is used, then manufacturing process is simple, but electric field concentration causes dielectric breakdown
Solution Approach 1:
The patent applies composite material principle by forming a multilayer gate insulating film with LaAlO3 high-k film and silicon oxide film. This composite structure provides superior dielectric breakdown resistance compared to single-layer films, while the atomic layer deposition process maintains manufacturing feasibility through a systematic deposition sequence.
Solution Approach 2:
The patent applies local quality principle by creating different film layers with specific functions: the LaAlO3 high-k film provides high dielectric constant for field reduction at critical locations, while the silicon oxide film provides interface quality and additional insulation. This localized functional differentiation enhances overall reliability without significantly complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multilayer gate insulating film structure effectively reduces the electric field at the gate insulating film, ensuring reliability and extending its lifespan, while simplifying the manufacturing process by omitting the p+-type regions and enhancing the dielectric breakdown electric field strength.
Implementation Method 1
repeatedly depositing a La2O3 atomic layer film alternating with an Al2O3 atomic layer film, as a deposition process, using an atomic layer deposition method
Implementation Method 2
performing a heat treatment at a temperature that is less than 900 degrees C. after the deposition process
Data Source
AI summary
A gate insulating film has a multilayer structure including a SiO2 film, a LaAlO3 film, and an Al2O3 film that are sequentially stacked, relative permittivity of the gate insulating film being optimized by the LaAlO3 film. In forming the LaAlO3 film constituting the gate insulating film, a La2O3 film and an Al2O3 film are alternately deposited repeatedly using an ALD method. The La2O3 film is deposited first, whereby during a POA performed thereafter, a sub-oxide of the surface of the SiO2 film is removed by a cleaning effect of lanthanum atoms in the La2O3 film. A temperature of the POA is suitably set in a range from 700 degrees C. to less than 900 degrees C.