SiC Gate Pad Structure for Fast Depletion and Breakdown Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon carbide semiconductor devices face issues with high resistance and slow depletion of p+-type high-concentration regions under rapid voltage increases, leading to potential dielectric breakdown and reduced reliability, especially at subzero temperatures.
Innovation Solution
Incorporating n+-type regions electrically floating between the p++-type contact region and the gate pad, which rapidly discharge holes and ionize acceptors, forming a depletion layer that fixes the pn junction to the source potential, thereby preventing high voltage propagation and enhancing dielectric breakdown capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p+-type high-concentration region is provided between the p-type base region and n--type drift region under the gate pad, then the potential increase in regions directly beneath the gate pad is suppressed, but the resistance of the p+-type high-concentration region remains high and depletion is slow under rapid voltage increases
Solution Approach 1:
The invention divides the p+-type high-concentration region into multiple segments by introducing n+-type regions that are electrically connected to the source electrode. These n+-type regions act as intermediate contact points, segmenting the high-resistance p+-type region into smaller sections with lower effective resistance, thereby accelerating the depletion process while maintaining the potential suppression function.
Solution Approach 2:
The n+-type regions serve as intermediary elements between the source electrode and the p+-type high-concentration region. These intermediary regions provide low-resistance pathways for charge carriers, enabling faster discharge of holes from the p+-type region and accelerating its depletion without compromising the potential stabilization function.
2Reliability
If the p+-type high-concentration region is used to fix the pn junction to source potential, then dielectric breakdown is prevented, but under subzero temperatures the resistance increases and depletion becomes even slower
Solution Approach 1:
By segmenting the p+-type high-concentration region with multiple n+-type regions, the effective resistance is reduced in sections. This segmentation compensates for the temperature-dependent resistance increase, ensuring that even at subzero temperatures where the p+-type region's resistance naturally increases, the overall depletion process remains sufficiently fast through the lower-resistance n+-type pathways.
Solution Approach 2:
The invention changes the impurity concentration parameter by introducing highly doped n+-type regions (with impurity concentration of 1×10^19 to 1×10^21 atoms/cm³) into the structure. This parameter change creates low-resistance pathways that counteract the temperature-induced resistance increase in the p+-type region, maintaining effective depletion performance across a wide temperature range including subzero conditions.
3Ease of manufacture
If the gate pad area is made relatively large for bonding wiring, then wiring bonding capability is improved, but the area directly beneath the gate pad requires larger p+-type high-concentration region for potential suppression
Solution Approach 1:
The introduction of multiple n+-type regions segments the potential suppression structure beneath the large gate pad area. This segmentation allows the potential suppression function to be achieved through distributed low-resistance contact points rather than requiring a large continuous p+-type region, thereby simplifying the underlying structure while accommodating the larger gate pad area needed for wiring bonding.
Solution Approach 2:
The n+-type regions act as intermediary contact points that provide efficient electrical connection between the source electrode and the p+-type high-concentration region. These intermediaries enable effective potential suppression with a more compact and less complex underlying structure, even when the gate pad area is enlarged for wiring bonding purposes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the resistance value of the p+-type high-concentration region and prevents potential increases, ensuring reliable operation even under rapid voltage changes and subzero temperatures by forming a depletion layer that maintains the pn junction at the source potential.
Implementation Method 1
rapidly discharge holes and ionize acceptors, forming a depletion layer that fixes the pn junction to the source potential
Implementation Method 2
forming a depletion layer that fixes the pn junction to the source potential
Implementation Method 3
The p+-type high-concentration region depletes when voltage that is positive with respect to the source electrode is applied to a drain electrode and has a function of fixing a pn junction
Data Source
AI summary
Between the front surface of a semiconductor substrate and an n−-type drift region, a p++-type contact region, a p-type base region, a p+-type high-concentration region, and an n-type current spreading region are provided directly beneath a gate pad, sequentially from a front side of the semiconductor substrate so as to face an entire surface of a gate pad, via a field oxide film. The high-concentration region is electrically connected to source electrode wiring via a p++-type wiring region. N+-type regions that are electrically floating (or n+-type wiring regions of the source potential) are selectively provided between the front surface of the semiconductor substrate and the contact region. The n+-type regions have a function of drawing out holes in the high-concentration region and discharging the holes to the source electrode, when the voltage applied to the drain electrode rapidly increases with respect to the potential of the source electrode.