SiC Semiconductor Gate Resistor Temperature Coefficient
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Solution Overview
Problem
Semiconductor devices with silicon carbide (SiC) substrates face challenges in suppressing switching loss and current crowding due to temperature increases, as existing resistive elements with high resistance coefficients lead to increased switching losses and current imbalances.
Innovation Solution
A semiconductor device with a ceramic resistive element having a resistor temperature coefficient within ±150×10−6/K, electrically connected to the gate of a transistor element, is used to mitigate these issues by maintaining low resistance and preventing current crowding, while being formed in a SiC substrate to manage temperature-related increases effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistive element with high resistance is externally attached to the gate to prevent gate oscillation, then gate oscillation is suppressed, but switching loss increases
Solution Approach 1:
The patent changes the temperature coefficient parameter of the resistive element from high (conventional) to low (±150×10−6/K or less). This parameter change allows the resistor to maintain stable resistance characteristics across temperature variations, suppressing gate oscillation while minimizing switching loss even at elevated temperatures.
Solution Approach 2:
The patent employs a ceramic composate material for the resistive element that combines ceramic base material with conductive particles or phases. This composite structure provides both the low temperature coefficient requirement and appropriate resistance characteristics, resolving the contradiction between oscillation suppression and switching loss.
2Reliability
If resistance of the resistive element is increased to suppress gate oscillation, then gate oscillation is prevented, but switching loss increases
Solution Approach 1:
The patent optimizes the resistance value and temperature coefficient parameter simultaneously. By selecting a resistor with low temperature coefficient (±150×10−6/K or less) and appropriate resistance value, the patent achieves gate oscillation prevention without excessive switching loss, as the resistance remains stable across the operating temperature range.
3Reliability
If conventional resistive elements are used, then gate oscillation can be suppressed, but current crowding and temperature increase occur
Solution Approach 1:
The patent changes the temperature coefficient parameter to low (±150×10−6/K or less), which stabilizes the resistance value across temperature variations. This prevents the resistance from changing with temperature, thereby suppressing gate oscillation while avoiding current crowding and excessive temperature increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces switching losses by maintaining low resistance and preventing current imbalances, even at elevated temperatures, thereby enhancing the performance and efficiency of the semiconductor device.
Implementation Method 1
The resistive element may have a resistor temperature coefficient which is within the range of ±150×10−6/K
Data Source
AI summary
In a semiconductor device using, as a FWD, a diode formed in a silicon carbide (SiC) substrate, while preventing gate oscillation, an increase of switching loss is suppressed at the time of a temperature increase also. A semiconductor device includes: a transistor element; a diode element formed in a SiC substrate; and a resistive element that is electrically connected to a gate of the transistor element, and has a resistor temperature coefficient which is within the range of ±150×10−6/K. The resistive element has a resistor formed of a ceramic-containing material.