SiC Power Semiconductor Gate Shielding Against Dielectric Breakdown
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Solution Overview
Problem
Power semiconductor devices using silicon carbide (SiC) face challenges in maintaining high voltage and high temperature stability while preventing dielectric breakdown, especially due to the stress on the gate insulation layer under high electric fields.
Innovation Solution
The design includes a semiconductor layer with a protrusion and a shielding region of opposite conductivity type, a gate insulation layer, and a gate electrode layer that covers the protrusion and source region, with a shielding region formed to prevent dielectric breakdown and facilitate current flow by distributing impurities appropriately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a trench-type gate structure is used to increase channel density, then the power handling capability is improved, but the gate insulation layer is subjected to higher electric field stress which may cause dielectric breakdown
Solution Approach 1:
An intermediate shielding region with third conductivity type is introduced between the gate insulation layer and the drift region. This shielding region acts as a mediator that redistributes the electric field, reducing the stress on the gate insulation layer while maintaining the high power handling capability of the trench-type gate structure
Solution Approach 2:
The shielding region is locally positioned at the bottom of the trench structure where the electric field stress is most concentrated. By modifying only this critical local area with a different conductivity type, the electric field distribution is optimized without changing the overall device structure, thereby protecting the gate insulation layer while maintaining high power capability
2Temperature
If silicon carbide is used instead of silicon to operate at high voltage and high temperature, then the breakdown voltage and heat dissipation are improved, but the dielectric breakdown risk under high electric fields increases
Solution Approach 1:
The shielding region with third conductivity type serves as an intermediary layer between the high-voltage silicon carbide drift region and the gate insulation layer. This intermediate region mitigates the high electric field stress generated by the silicon carbide's high breakdown voltage capability, preventing dielectric breakdown while maintaining high-temperature operation
Solution Approach 2:
The conductivity type of the shielding region is specifically designed to be opposite to the drift region (third conductivity type different from first conductivity type). This parameter change in conductivity creates an electric field shielding effect that reduces the electric field stress on the gate insulation layer, allowing the device to operate at high voltages without dielectric breakdown
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the stability and heat dissipation of the power semiconductor device, allowing it to operate effectively at high temperatures and voltages while reducing the risk of dielectric breakdown, thereby improving its performance and reliability.
Implementation Method 1
a shielding region having a second conductivity type opposite to the first conductivity type and disposed within the protrusion and configured to contact a top surface of the protrusion
Data Source
AI summary
A power semiconductor device including a semiconductor layer having a first conductivity type and configured to include a protrusion formed from an upper region of the semiconductor layer to partially protrude upward, a shielding region having a second conductivity type opposite to the first conductivity type and disposed within the protrusion and configured to contact a top surface of the protrusion, a gate insulation layer disposed on the semiconductor layer and configured to cover the protrusion and to come into contact with the shielding region, and a gate electrode layer disposed on the gate insulation layer.