SiC Gate Shielding Structure for High-Field Dielectric Protection
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Solution Overview
Problem
The challenge in silicon carbide (SiC) power devices is the need for effective shielding to protect the gate dielectric from high electric fields, which is crucial for achieving long-term reliability and improving performance metrics such as reduced gate-to-drain capacitance and saturation current.
Innovation Solution
A shielding structure is implemented in SiC devices, comprising a planar gate structure with a shielding region of higher dopant concentration covering at least 20% but less than 100% of the gate length, providing 3-dimensional shielding and reducing channel width, thereby protecting the gate dielectric and enhancing voltage blocking capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shielding structures are added to protect the gate dielectric from high electric fields, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by creating a shielding region with higher dopant concentration specifically in the body region beneath the gate structure, rather than uniformly doping the entire device. This localized high-dopant region provides targeted electric field shielding exactly where the gate dielectric needs protection, while leaving other regions with lower doping to maintain their intended electrical characteristics and minimize overall device complexity
Solution Approach 2:
The patent utilizes parameter changes by varying the dopant concentration parameter within the body region. A first region has a first dopant concentration while a second region (the shielding region) has a second dopant concentration that is higher. This parameter variation enables the shielding function without adding structural complexity, as the same body region material is used but with modified doping parameters in specific areas
2Reliability
If shielding region covers more of the gate length, then electric field shielding is improved, but gate-to-drain capacitance increases
Solution Approach 1:
The patent applies partial action by having the shielding region cover only a portion of the gate length rather than the entire gate structure. The shielding region extends from a first position to a second position along the gate length, leaving other portions without shielding. This partial coverage provides sufficient electric field protection where most needed while limiting the capacitive coupling between gate and drain that would occur with full-length shielding
3Strength
If dopant concentration in shielding region is increased, then high voltage blocking capability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies segmentation by dividing the body region into multiple zones with different dopant concentrations: a first region with a first dopant concentration and a second region (shielding region) with a second, higher dopant concentration. This segmentation allows the high-dopant shielding region to be formed using separate fabrication steps such as selective ion implantation or epitaxial growth, enabling precise control of the dopant profile and reducing overall manufacturing precision requirements compared to attempting to dope the entire structure uniformly
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The shielding structure effectively protects the gate dielectric from high electric fields, allowing for high voltage blocking capability without increasing on-state resistance and improving channel definition, thus enhancing device reliability and performance.
Implementation Method 1
proper shielding of, e.g., the gate dielectric from high electric fields within SiC power FETs
Implementation Method 2
a maximum dopant concentration in the shielding region is higher than a maximum dopant concentration in the body region
Data Source
AI summary
A silicon carbide device includes: a planar gate structure on a first surface of a silicon carbide substrate, the planar gate structure having a gate length along a lateral first direction; a source region of a first conductivity type extending under the planar gate structure over at least part of the gate length; a body region of a second conductivity type, the body region including a channel zone that adjoins the source region under the planar gate structure; and a shielding region of the second conductivity type covering the channel zone over at least 20% but less than 100% of the gate length, wherein a maximum dopant concentration in the shielding region is higher than a maximum dopant concentration in the body region.