SiC Substrate Groove Layout to Prevent Dicing Chipping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in manufacturing semiconductor devices using silicon carbide (SiC) lies in the formation of voids between polycrystalline and single crystal SiC layers, leading to chipping, peeling, and substrate warpage during dicing, which affects the electrical characteristics and reliability of the devices.
Innovation Solution
A method involving the formation of a second groove with a specific width before dicing, exposing the polycrystalline SiC substrate at the bottom, followed by a first groove with a smaller width to minimize contact and friction during dicing, thereby reducing chipping and peeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dicing is performed directly on the substrate with polycrystalline and single crystal SiC layers, then substrate processing is completed, but voids cause chipping, peeling, and warpage during dicing
Solution Approach 1:
The method forms a groove structure and fills it with resin material before performing dicing. This preliminary action supports the single crystal SiC layer during the subsequent dicing process, preventing voids from causing chipping and peeling, thereby resolving the contradiction between maintaining device reliability and achieving efficient substrate processing
Solution Approach 2:
Resin material is introduced as an intermediary substance that fills the groove formed between the polycrystalline and single crystal SiC layers. This resin acts as a mediator that supports the single crystal layer during dicing, eliminating the harmful effect of voids while allowing continuous substrate processing
2Length of moving object
If the single crystal SiC layer is thin to reduce substrate thickness, then device integration is improved, but the layer becomes more susceptible to damage during dicing
Solution Approach 1:
The groove formation and resin filling are performed as preliminary actions before dicing thin substrates. This provides structural support to the thin single crystal SiC layer during the dicing process, enabling the use of thinner substrates for better device integration without increasing susceptibility to damage
Solution Approach 2:
The resin material is selectively placed in the groove region where the single crystal SiC layer is most vulnerable during dicing. This local reinforcement provides targeted support to the thin layer at the critical dicing location while maintaining the overall thin substrate structure for device integration
Data Source
AI summary
A semiconductor device manufacturing method includes: forming an SiC layer on a single crystal SiC layer of a substrate, the substrate having a polycrystalline SiC substrate and the single crystal SiC layer provided on the second surface; forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and the second insulating film being spaced apart from each other by a third width; forming a second groove by removing a first portion of the single crystal SiC layer and a second portion of the SiC layer provided on the first portion; and forming a first groove by dicing, the first groove being provided below the second groove, the first groove having a first width smaller than the second width in the first direction, the first groove extending in the second direction, and the polycrystalline SiC substrate being cut by the first groove.


