SiC GTO Semiconductor Ledge Layer for Surface Passivation
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Solution Overview
Problem
Current SiC Gate Turn-Off Thyristors (GTOs) face current gain instability due to surface recombination caused by etching damage, leading to increased turn-on current and on-resistance, which is not effectively mitigated by existing passivation methods.
Innovation Solution
The implementation of a semiconductor ledge layer, either lightly doped N-type or P-type, epitaxially grown over the damaged surfaces to provide high-quality passivation, reducing interface charge and surface traps, and optionally followed by a thermal oxidation process to further optimize the doping level and thickness of the ledge layer for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If an etching process is used to form the anode, then the P-type epitaxial layers can be shaped correctly, but surface recombination occurs due to crystalline structure damage
Solution Approach 1:
A semiconductor ledge layer is epitaxially grown on the P-type epitaxial layers before final anode formation to pre-passivate the surfaces. This preliminary action prevents surface recombination from occurring during subsequent processing steps while maintaining the required anode geometry.
Solution Approach 2:
The semiconductor ledge layer acts as an intermediary between the damaged etched surface and the functional anode structure. It provides a high-quality crystalline interface that eliminates surface traps while allowing the anode to maintain its etched shape for proper device operation.
2Reliability
If surface passivation is applied to reduce interface charge, then current gain increases, but device complexity increases
Solution Approach 1:
The semiconductor ledge layer is formed from the same semiconductor material as the bulk device layers, ensuring homogeneous material properties throughout the structure. This eliminates the need for disparate passivation materials and simplifies the overall device architecture while maintaining high current gain.
Solution Approach 2:
The doping concentration of the ledge layer is optimized to be lower than the underlying P-type epitaxial layer, creating a gradual transition that reduces interface charge without requiring additional processing steps or complex multi-layer structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the current gain of the top transistor, decreases the turn-on current, and stabilizes the operation of the GTO by effectively mitigating surface recombination and interface charge, resulting in improved reliability and efficiency.
Implementation Method 1
a semiconductor ledge layer, either lightly doped N-type or P-type, epitaxially grown over the damaged surfaces to provide high-quality passivation
Implementation Method 2
optionally followed by a thermal oxidation process to further optimize the doping level and thickness of the ledge layer for improved performance
Data Source
Figure 1A~1B
Figure 1C
Figure 2A~2B
AI summary
Electronic device structures including semiconductor ledge layers for surface passivation and methods of manufacturing the same are disclosed. In one embodiment, the electronic device includes a number of semiconductor layers of a desired semiconductor material having alternating doping types. The semiconductor layers include a base layer of a first doping type that includes a highly doped well forming a first contact region of the electronic device and one or more contact layers of a second doping type on the base layer that have been etched to form a second contact region of the electronic device. The etching of the one or more contact layers causes substantial crystalline damage, and thus interface charge, on the surface of the base layer. In order to passivate the surface of the base layer, a semiconductor ledge layer of the semiconductor material is epitaxially grown on at least the surface of the base layer.