SiC Semiconductor Guard Ring Trench Width Equalization

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Solution Overview

Problem

Conventional SiC semiconductor devices with a guard ring and connection portion configuration struggle to achieve the required withstand voltage due to differences in trench formation areas and epitaxial layer thicknesses, leading to residue formation and reduced breakdown voltage.

Innovation Solution

The configuration includes a substrate with a drift layer and conductivity type layers formed in trenches, where the guard ring and connection portions have a specific width and interval ratio matching the cell portion, allowing for equalized epitaxial layer thicknesses and preventing residue formation during etching, thus enhancing breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the guard ring portion and connection portion are formed with conventional trench configurations, then the device structure is simple, but the epitaxial layer thickness becomes non-uniform causing residue formation and reduced breakdown voltage

Engineering Contradiction:
Improveepitaxial layer thickness uniformityVSAvoidtrench configuration complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by configuring trenches differently in different regions: the cell portion has trenches with a first width, while the guard ring and connection portions have trenches with a second width that is different from the first width. This localized differentiation ensures uniform epitaxial layer thickness across all portions while maintaining the necessary structural complexity only where required.

Inventive Principle:
Principle #3Local quality

2Reliability

If the second conductivity type layer is formed with varying thickness in different portions, then the manufacturing process is simple, but residue remains after etching and withstand voltage cannot be secured

Engineering Contradiction:
Improvewithstand voltageVSAvoidepitaxial layer formation complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the parameter of trench width to control epitaxial layer thickness. By setting the trench width in the guard ring and connection portions (second width) to be different from the trench width in the cell portion (first width), the epitaxial layer thickness becomes uniform across all portions during the same formation process, preventing residue and ensuring the required withstand voltage.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If conventional trench formation is used in all portions, then the manufacturing process is uniform and simple, but the breakdown voltage requirement cannot be met due to residue formation

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements local quality by applying different trench width configurations to different portions of the device. The cell portion uses trenches with a first width, while the guard ring and connection portions use trenches with a second width. This localized approach achieves the required breakdown voltage by preventing residue formation without making the entire manufacturing process complex.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration ensures equal epitaxial layer thicknesses across the cell, connection, and guard ring portions, preventing residue formation and achieving the required breakdown voltage, thereby securing the semiconductor device's performance.

Implementation Method 1

the second conductivity type layer is made of an epitaxial film having the second conductivity type

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS10720492B2Silicon carbide semiconductor device and manufacturing method therefor
Publication Date: 2020.07.21 DENSO CORP
  • US10720492B2 patent drawing
  • US10720492B2 patent drawing
  • US10720492B2 patent drawing

AI summary

The width of the p type guard ring is set to match the interval between the adjacent p type guard rings, and the width of the p type guard ring is made larger as the interval between the p type guard rings becomes larger. The width of the frame portion is basically equal to the width of the p type deep layer so that the interval between the frame portions is equal to the interval between the p type deep layers. This makes it possible to reduce the difference in formation areas of the trenches per unit area in the cell portion, the connection portion and the guard ring portion. Therefore, when the p type layer is formed, the difference in the amount of the p type layer embedding into the trenches per unit area also decreases and the thickness of the p type layer is equalized.