SiC Heterojunction Normally-Off HEMT With Homogeneous Interface
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Solution Overview
Problem
The development of silicon carbide (SiC) heterojunction normally-off high-electron-mobility transistors (HEMTs) faces challenges due to diffusive contamination across the heterojunction interface, which complicates the manufacturing process and affects device performance, unlike group-III nitride heterojunctions that exhibit spontaneous and piezoelectric polarization effects.
Innovation Solution
A method for preparing SiC heterojunction normally-off HEMTs involves growing unintentionally doped n-type 4H-SiC and 3C-SiC layers through isomorphic and epitaxial growth, forming homogeneous elements on both sides of the heterojunction interface, eliminating diffusive contamination and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If diffusive contamination is eliminated by using homogeneous elements on both sides of the heterojunction interface, then device reliability and stability are improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent uses homogeneous elements (Si and C) on both sides of the heterojunction interface in the 3C-SiC/4H-SiC structure. This eliminates diffusive contamination that would occur with heterogeneous materials, directly improving device reliability and stability while maintaining manufacturing feasibility through standard epitaxial growth techniques
2Reliability
If interface 2DEG and 2DHG interference is minimized by optimizing heterojunction structure, then device performance is improved, but process complexity increases
Solution Approach 1:
The patent optimizes the heterojunction interface by creating specific crystal orientations (C-face and Si-face) and controlling the local atomic arrangement at the interface. This minimizes unwanted 2DEG and 2DHG formation through precise local structural control rather than complex global process changes, improving device performance while keeping the manufacturing process manageable
3Ease of manufacture
If isomorphic and epitaxial growth methods are used to grow SiC layers, then manufacturing process is simplified, but growth time and energy consumption increase
Solution Approach 1:
The patent employs isomorphic growth to transition from 4H-SiC substrate to 3C-SiC potential well layer, and epitaxial growth for subsequent layers. These controlled phase transitions enable continuous layer formation without interruption, simplifying the manufacturing process by eliminating the need for separate deposition and annealing steps that would increase overall processing time and energy consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in SiC heterojunction HEMTs with improved performance by minimizing interface 2DEG and 2DHG interference, reducing process complexity, and enhancing device reliability and stability.
Implementation Method 1
a two-dimensional electron gas (2DEG) channel is formed in virtue of the spontaneous, piezoelectric polarization effects of the AlGaN/GaN heterojunction
Implementation Method 2
growing a 4H—SiC transition layer on an upper surface of the substrate through isomorphic epitaxial growth
Data Source
AI summary
A method for preparing a silicon carbide heterojunction normally-off high-electron-mobility transistor includes selecting an unintentionally doped n-type 4H-SiC chip as a substrate; growing a 4H—SiC transition layer on the substrate through isomorphic epitaxial growth, and growing a C face on the 4H—SiC transition layer through epitaxial growth; growing an unintentionally doped 3C—SiC potential well layer on the C face of the 4H—SiC transition layer; growing an n-type doped 4H—SiC barrier layer on the 3C—SiC potential well layer, and growing a Si face on the 4H—SiC barrier layer through epitaxial growth; growing an unintentionally doped 3C—SiC cap layer on the Si face of the 4H—SiC barrier layer; and producing electrodes and protective films, so as to obtain a 3C—SiC/4H—SiC heterojunction normally-off single-channel high-electron-mobility transistor. The method allows two sides of the SiC heterojunction interface have homogeneous elements during preparation, thereby eliminating diffusive contamination and reducing process complexity.