SiC IGBT Channel Adjustment Layer for Forward Voltage Stability
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Solution Overview
Problem
High power insulated gate bipolar transistors (IGBTs) using silicon carbide face challenges with forward voltage degradation over time due to Basal Plane Dislocations, leading to increased on-resistance and power dissipation, especially at high temperatures and high blocking voltages, limiting their suitability for high power and high temperature applications.
Innovation Solution
The design incorporates a silicon carbide drift layer with a JFET region adjacent to the well region, a channel adjustment layer, and specific ohmic contacts, along with a graphite coating for implant activation and a pyrogenic steam annealing process to enhance device performance, including a metal overlayer connecting the ohmic contacts, which helps in reducing resistance and improving switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If bipolar operation is used to reduce drift layer resistance via conductivity modulation, then on-resistance is reduced and power efficiency is improved, but forward voltage degradation occurs over time due to Basal Plane Dislocations
Solution Approach 1:
The patent extracts and removes Basal Plane Dislocations from the silicon carbide crystal structure through selective epitaxial growth processes, eliminating the source of forward voltage degradation while preserving the bipolar conduction mechanism for low on-resistance
Solution Approach 2:
The patent changes the crystal orientation parameter from conventional directions to specifically oriented silicon carbide substrates that minimize BPD formation, and adjusts epitaxial growth parameters to achieve dislocation-free drift layers, enabling stable bipolar operation
2Reliability
If unipolar devices are used to avoid BPD related problems, then forward voltage stability is maintained, but on-resistance increases and power efficiency decreases
Solution Approach 1:
The patent converts the previously harmful effect of BPDs into a benefit by developing controlled epitaxial growth methods that eliminate BPDs in the drift layer while maintaining the desired bipolar conduction characteristics, thus achieving both low on-resistance and high reliability
3Power
If high blocking voltages are implemented, then power handling capability is improved, but on-resistance increases due to higher drift layer requirements
Solution Approach 1:
The patent employs composite material structures combining optimized silicon carbide drift layers with carefully engineered doping profiles and epitaxial layers, creating a multi-layer composite that achieves high breakdown voltage while maintaining low on-resistance through optimized carrier transport
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a high voltage planar IGBT with reduced on-resistance and improved switching speed, capable of operating effectively at high temperatures with a differential on-resistance of 88 mΩ×cm² at room temperature and 25 mΩ×cm² at 200°C, and achieving a 9 kV blocking voltage with low leakage current density, demonstrating enhanced reliability and efficiency.
Implementation Method 1
forming a graphite coating for implant activation and removing the graphite coating after annealing the implanted ions
Implementation Method 2
annealing the implanted ions includes annealing the silicon carbide layer and the graphite coating. Annealing the implanted ions may include annealing the implanted ions at a temperature greater than 1700 °C
Implementation Method 3
annealing the gate oxide layer in wet O2. annealing the gate oxide layer in wet O2 may include annealing the gate oxide layer in wet O2 at a temperature less than or equal to about 950 °C for at least one hour
Implementation Method 4
Generating pyrogenic steam may include heating the pyrogenic chamber, supplying hydrogen and oxygen gas to the pyrogenic chamber, and combusting the hydrogen gas and the oxygen gas to form the pyrogenic steam
Implementation Method 5
a metal overlayer electrically connecting the first ohmic contact and the second ohmic contact
Implementation Method 6
bipolar operation to reduce the drift layer resistance via conductivity modulation resulting from injected minority carriers
Data Source
Figure 1~2A
Figure 2B~2C
Figure 2D~3
AI summary
An insulated gate bipolar transistor, comprising: a substrate having a first conductivity type; a drift layer having a second conductivity type opposite the first conductivity type; a well region in the drift layer and having the first conductivity type; a epitaxial channel adjustment layer on the drift layer and having the second conductivity type and having a thickness of about 0.25 µm or more; an emitter region extending from a surface of the epitaxial channel adjustment layer through the epitaxial channel adjustment layer and into the well region, the emitter region having the second conductivity type and at least partially defining a channel region in the well region adjacent to the emitter region; a gate oxide layer on the channel region; and a gate on the gate oxide layer.