SiC IGBT Epitaxial Overgrowth for Low-Defect Substrate Reuse

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Solution Overview

Problem

The high cost and complexity of producing silicon carbide substrates for semiconductor devices, coupled with the magnification of defects leading to yield loss and reduced reliability, hinder the widespread adoption of high power and high efficiency semiconductor devices.

Innovation Solution

A method involving the use of a silicon carbide substrate with an A-plane orientation for epitaxial growth, utilizing a hard mask layer and lateral epitaxial overgrowth to form low-defect density epitaxial layers, enabling the reuse of the substrate for multiple device fabrication cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional vapor phase ingot growth followed by cropping, wire sawing, and grinding/polishing is used to produce SiC substrates, then substrate quality is improved, but manufacturing cost and process complexity increase significantly

Engineering Contradiction:
Improvesubstrate qualityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the complex vapor phase ingot growth step from the substrate manufacturing process. Instead, it uses a simpler solid-state diffusion process to grow SiC layers directly on existing substrates, thereby reducing process complexity while maintaining substrate quality through controlled epitaxial growth

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the fundamental manufacturing parameters by transitioning from high-temperature vapor phase growth to solid-state diffusion at lower temperatures. This parameter change simplifies the overall process while achieving comparable or superior substrate quality through precise control of diffusion conditions

Inventive Principle:
Principle #35Parameter changes

2Power

If larger die sizes are used to accommodate high current devices, then device performance is improved, but defect impact is magnified leading to yield loss

Engineering Contradiction:
Improvedevice power handlingVSAvoiddevice yield
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies local quality by creating regions of different defect densities within the substrate. The epitaxial growth process produces areas with controlled, low defect density in critical device regions, allowing larger die sizes to be used without proportionally increasing defect impact, thereby maintaining both high power capability and yield

Inventive Principle:
Principle #3Local quality

3Reliability

If more substrate processing steps are implemented to improve quality, then device reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs preliminary defect prevention by using epitaxial growth to create high-quality, low-defect regions before device fabrication begins. This preliminary action reduces the need for subsequent costly defect correction steps and substrate reprocessing, thereby improving reliability while controlling manufacturing costs

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces substrate costs and enhances device performance by minimizing defects, thereby improving yield and reliability of high voltage semiconductor devices like IGBTs.

Implementation Method 1

utilizing a hard mask layer and lateral epitaxial overgrowth to form low-defect density epitaxial layers

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20250318164A1Insulated Gate Bipolar Transistor Having Improved Electrical Performance
Publication Date: 2025.10.09 THINSIC INC
  • US20250318164A1 patent drawing
  • US20250318164A1 patent drawing
  • US20250318164A1 patent drawing

AI summary

Two or more IGBTs (insulated gate bipolar transistors) formed in or on a 4H silicon carbide (SiC) A-plane <1120> substrate of a first type. A merge layer is formed in the SiC substrate. The merge layer comprises an epitaxial layer of the first type formed by on-axis epitaxial lateral overgrowth. At least one epitaxial layer is formed overlying a surface of the merge layer. The at least one epitaxial layer is of a second type and at least 25 microns thick. The at least one epitaxial layer is formed by vertical epitaxial overgrowth. The at least one epitaxial layer is at least 25 microns thick and is a drift layer for the two or more IGBTs. An exfoliation process is configured to separate the SiC substrate at the merge layer from the two or more IGBTs. The SiC substrate is prepared and reused to form other semiconductor devices.