SiC Epitaxial Layer Impurity Control for Stable Carrier Lifetime

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional silicon carbide semiconductor devices have high defect densities in the n−-type silicon carbide epitaxial layer and n+-type buffer layer, leading to short minority and majority carrier lifetimes, which result in variations in reverse recovery characteristics and device failure due to uncontrolled carrier lifetime and defect density.

Innovation Solution

A silicon carbide semiconductor device is designed with a deep region in the n-type epitaxial layer where the maximum aluminum concentration is less than 3.0×10^13/cm^3 and the maximum boron concentration is less than 1.0×10^14/cm^3, reducing defect densities and enhancing carrier lifetimes, allowing for controlled carrier lifetime specific to each device element.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional silicon carbide epitaxial layers and buffer layers are used with high defect densities, then manufacturing is easier and cost is lower, but carrier lifetime is short and reverse recovery characteristics vary

Engineering Contradiction:
Improvecarrier lifetimeVSAvoiddefect density
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling the concentrations of aluminum and boron impurities in the silicon carbide epitaxial layer. By setting aluminum concentration to 1×10^12 to 1×10^13/cm³ and boron concentration to 1×10^11 to 1×10^12/cm³, the invention achieves extended carrier lifetime while maintaining manufacturing feasibility through controlled low-defect growth processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements local quality by creating a specific deep region within the epitaxial layer with distinct impurity concentration characteristics. This region, positioned 1 μm or more from the interface with the base layer, has controlled aluminum and boron concentrations that differ from conventional uniform structures, thereby locally optimizing carrier lifetime without compromising overall device manufacturability

Inventive Principle:
Principle #3Local quality

2Reliability

If impurity concentrations are reduced to extend carrier lifetime, then reverse recovery characteristics are suppressed, but breakdown voltage may be affected

Engineering Contradiction:
Improvereverse recovery characteristicsVSAvoidbreakdown voltage
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent resolves this contradiction through parameter changes by optimizing both aluminum and boron concentration parameters simultaneously. The specific range of aluminum (1×10^12 to 1×10^13/cm³) and boron (1×10^11 to 1×10^12/cm³) concentrations achieves extended carrier lifetime and suppressed reverse recovery characteristics while maintaining adequate breakdown voltage through the synergistic effect of controlled impurity levels

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies partial action by implementing impurity concentration control specifically in the deep region of the epitaxial layer rather than uniformly throughout the entire device structure. This localized control extends carrier lifetime and improves reverse recovery characteristics without excessively reducing impurity concentrations throughout the whole device, thereby preserving breakdown voltage

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11824093B2Silicon carbide semiconductor device
Publication Date: 2023.11.21 FUJI ELECTRIC CO LTD
  • US11824093B2 patent drawing
  • US11824093B2 patent drawing
  • US11824093B2 patent drawing

AI summary

A silicon carbide semiconductor device includes silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a first semiconductor region of the first conductivity type, a trench, a gate insulating film, a gate electrode, and an interlayer insulating film. The first semiconductor layer and the second semiconductor layer constitute a first-conductivity-type semiconductor layer and in a deep region of the first-conductivity-type semiconductor layer at least 1 μm from an interface with the third semiconductor layer, a maximum value of a concentration of aluminum is less than 3.0×1013/cm3. In the deep region of the first-conductivity-type semiconductor layer, a maximum value of a concentration of boron is less than 1.0×1014/cm3.