SiC JBS Schottky Diode Annealing for Low-Resistance P-Contacts
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Solution Overview
Problem
Conventional silicon carbide Schottky barrier diodes (SiC-SBDs) face issues with high contact resistance between p-type regions and the front electrode, leading to localized surge current concentration and heat generation during high-current applications, which can cause device destruction.
Innovation Solution
A manufacturing method involving ion implantation of p-type regions and a heat treatment at 1700-1900°C for over 20 minutes to form a titanium film with low-resistance ohmic junctions, eliminating the need for nickel silicide films, thereby reducing contact resistance to 5×10−4 to 8×10−3 Ω·cm².
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional heat treatment at about 1640 degrees C. for about 3 minutes is performed, then the manufacturing process is simple and fast, but the contact resistance between p-type regions and front electrode remains high, causing localized surge current concentration and heat generation
Solution Approach 1:
The patent applies parameter changes by significantly increasing both the temperature (from 1640°C to 1700-1900°C) and treatment time (from 3 minutes to over 20 minutes) of the heat treatment process. This transforms the activation annealing parameters to achieve low-resistance ohmic junctions with contact resistance of 5×10^-4 to 8×10^-3 Ω·cm², resolving the high contact resistance issue while accepting extended manufacturing time.
2Reliability
If high current flows through Schottky barrier junctions alone, then the device operates normally under rated current, but during surge current application the Schottky barrier junctions cannot bear all the surge current, leading to device destruction
Solution Approach 1:
The patent applies local quality by creating p-type regions with specific impurity concentrations (1×10^19 to 1×10^21 atoms/cm³) in localized areas of the semiconductor substrate. These p-type regions form pn junctions that provide alternative current paths during surge conditions, while the Schottky barrier junctions continue to handle normal rated current, thus distributing current load and preventing localized heat generation.
Solution Approach 2:
The patent employs a composite structure combining Schottky barrier junctions and pn junctions in a JBS (Junction Barrier Schottky) configuration. This composite material approach allows the device to leverage both Schottky and pn junction characteristics, enabling the Schottky junctions to provide low forward voltage drop during normal operation while pn junctions provide surge current handling capability through bipolar operation.
3Reliability
If p+-type contact regions are formed by ion implantation with high impurity concentration, then contact resistance is reduced to about 1×10^-2 Ω·cm², but the manufacturing process becomes more complex and time-consuming
Solution Approach 1:
The patent applies the taking out principle by eliminating the separate p+-type contact region formation step. Instead of performing distinct ion implantation and heat treatment steps for contact regions, the method integrates contact resistance reduction into the single activation annealing process that forms the p-type regions, thereby simplifying the manufacturing process while achieving low contact resistance of 5×10^-4 to 8×10^-3 Ω·cm².
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Facilitates the flow of surge current through p-type regions, inhibiting local concentration and enhancing bipolar operation, thus preventing device destruction and improving reliability while reducing manufacturing costs.
Implementation Method 1
performing a heat treatment thereby activating the second-conductivity-type impurity
Implementation Method 2
ion-implanting a second-conductivity-type impurity into the semiconductor substrate to selectively form at least one second-conductivity-type region
Data Source
AI summary
A silicon carbide semiconductor device is a SiC-SBD that has, in an active region, at a front surface of a semiconductor substrate containing silicon carbide, a mixture of a SBD structure having Schottky barrier junctions between a titanium film that is a lowermost layer of a front electrode and an n−-type drift region, and a JBS structure having pn junction portions between p-type regions and the n−-type drift region. The p-type regions form ohmic junctions with the titanium film that is the lowermost layer of the front electrode. After an ion implantation for the p-type regions, activation annealing is performed at a temperature in a range of 1700 degrees C. to 1900 degrees C. for a treatment time exceeding 20 minutes, whereby contact resistance between the titanium film and the p-type regions is adjusted to be in a range of about 5×10−4 Ω·cm2 to 8×10−3 Ω·cm2.