Lateral SiC-JFET Layout for Independent Breakdown Voltage Tuning

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Solution Overview

Problem

The adjustment of breakdown voltage for conventional lateral SiC-JFET devices is limited by the size of the channel region, posing a technical challenge in achieving flexible voltage adjustments.

Innovation Solution

The lateral SiC-JFET device is designed with independent channel and drift regions, allowing for separate adjustments of on-off characteristics and breakdown voltage through independent implantation processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the channel region size is increased to adjust breakdown voltage, then the breakdown voltage can be modified, but the device loses flexibility in voltage adjustment because the channel region size is coupled with the breakdown voltage determination

Engineering Contradiction:
Improveflexibility in breakdown voltage adjustmentVSAvoidcoupling between channel region and breakdown voltage
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The device is divided into two independent functional regions: a channel region that controls on-off characteristics and a drift region that determines breakdown voltage. This segmentation allows independent optimization and adjustment of each parameter without mutual interference, enabling flexible voltage adjustment by modifying only the drift region while keeping the channel region unchanged.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The breakdown voltage determination function is extracted from the channel region and assigned to a separate drift region. This extraction removes the coupling between channel size and breakdown voltage, allowing the breakdown voltage to be adjusted independently through drift region modifications without affecting channel performance.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If separate implantation processes are used for channel and drift regions, then independent adjustment of on-off characteristics and breakdown voltage is achieved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveindependent parameter adjustmentVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The manufacturing process is segmented into separate implantation steps for the channel region and drift region. This segmentation enables independent control of doping parameters for each region, allowing precise adjustment of on-off characteristics and breakdown voltage separately, despite the increased process steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different implantation parameters (dose, energy, timing) are applied to the channel and drift regions in separate processes. This parameter differentiation allows independent optimization of each region's electrical characteristics, achieving the desired independent adjustment capability through controlled process variations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables flexible adjustment of breakdown voltage from tens to hundreds of volts without being limited by the channel region, improving the device's performance and reliability.

Implementation Method 1

The channel and drift regions are formed as independent structures through separate ion implantation processes

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Data Source

PatentUS20250063760A1Laterally silicon carbide junction gate field effect transistor device and manufacturing method thereof
Publication Date: 2025.02.20 SUZHOU WATECH ELECTRONICS CO LTD
  • US20250063760A1 patent drawing
  • US20250063760A1 patent drawing
  • US20250063760A1 patent drawing

AI summary

Disclosed are a lateral silicon carbide junction gate field effect transistor (SiC-JFET) device and a manufacturing method thereof. The lateral SiC-JFET device includes a base; a source and a drift region formed on the base in sequence; a first source contact region, a second source contact region, and a channel region formed on the source in sequence; and a gate formed on the channel region; where the channel region and the drift region are independent structures respectively. The embodiments of the present disclosure solved the technical problem that the adjustment of the breakdown voltage of the conventional lateral SiC-JFET device is limited by the size of the channel region.